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2024-06-28Fix insn interactive command (catch/print trap, use proper access func)abejgonzalez1-29/+30
2024-06-26Merge pull request #1709 from abejgonzalez/add-insn-debug-mode-cmdsAndrew Waterman2-19/+57
2024-06-26Add insn cmds to interactive debug modeabejgonzalez2-19/+57
2024-06-26Merge pull request #1711 from riscv-software-src/zfa-disasmAndrew Waterman1-1/+105
2024-06-26Expand default disassembly ISAAndrew Waterman1-1/+2
2024-06-26Add disassembly for Zfa extensionAndrew Waterman1-0/+103
2024-06-26Merge pull request #1710 from riscv-software-src/fix_debug_ciJerry Zhao1-1/+1
2024-06-26Fix riscv-tests commit for CIJerry Zhao1-1/+1
2024-06-22Merge pull request #1705 from rpsene/masterJerry Zhao1-0/+1
2024-06-22Fix: Add missing <stdexcept> header for std::logic_errorRafael Sene1-0/+1
2024-06-21Merge pull request #1701 from riscv-software-src/zvl_zveJerry Zhao15-119/+93
2024-06-21Merge pull request #1704 from riscv-software-src/thread-local-againAndrew Waterman1-2/+1
2024-06-21Fix C/C++ thread-local linkage differentlyAndrew Waterman1-2/+1
2024-06-21Vector-fp instructions depend on zve, not F/DJerry Zhao2-10/+12
2024-06-21Restrict spike to vlen <= 4096Jerry Zhao1-0/+4
2024-06-21Remove all --varch parsingJerry Zhao9-93/+1
2024-06-21Switch to Zvl/Zve parsing from isa_parser, instead of varchJerry Zhao1-1/+4
2024-06-21Disallow any vector, not just V, when no __int128 type is presentJerry Zhao1-1/+1
2024-06-21Relax require_vector check for misa.VJerry Zhao1-2/+0
2024-06-21Relax mstatus.vs dependency on full VJerry Zhao2-1/+5
2024-06-21Relax vector_csr dependency on 'V'Jerry Zhao1-4/+0
2024-06-21Relax zvfh/zvfhmin dependency on V, they only actually depend on ZveJerry Zhao1-3/+0
2024-06-21Allow disassembly from implementations that are not full VJerry Zhao1-1/+1
2024-06-21Relax has_fs dependency on misa.vJerry Zhao1-2/+1
2024-06-21Add accessors to isa_parser's VLEN/ELENJerry Zhao1-0/+3
2024-06-21Add Zvl/Zve validation to isa_parserJerry Zhao1-0/+21
2024-06-21Add isa_parser parsing for zvl/zveJerry Zhao2-1/+40
2024-06-20Merge pull request #1702 from riscv-software-src/fix-1696Andrew Waterman1-20/+20
2024-06-20In isa_parser, move extensionology code before error-checking codeAndrew Waterman1-20/+20
2024-06-20Merge pull request #1695 from riscv-software-src/bf16-opsAndrew Waterman10-4/+443
2024-06-20Merge pull request #1690 from riscv-software-src/fix-warningsJerry Zhao2-17/+17
2024-06-18Add several BF16 ops to SoftFloatAndrew Waterman10-0/+435
2024-06-17Merge pull request #1694 from Du-Chao/masterAndrew Waterman1-1/+1
2024-06-18Add a prerequisite for buildingChao Du1-1/+1
2024-06-17Consistently order BF16 routines in Makefile and softfloat.hAndrew Waterman2-4/+8
2024-06-13Merge pull request #1689 from riscv-software-src/rounding-mode-thread-localAndrew Waterman1-2/+5
2024-06-13Make softfloat's rounding mode thread-localAndrew Waterman1-2/+5
2024-06-13Merge branch 'NXP-zilsd'Andrew Waterman11-17/+83
2024-06-13Adding Zilsd and Zcmlsd extensions (Load/store pair for RV32)Christian Herber11-17/+83
2024-06-12Fix a few compile warningsAndrew Waterman2-17/+17
2024-06-11Merge pull request #1679 from akifejaz/vector-cryptoAndrew Waterman1-0/+10
2024-06-12Merge branch 'master' into vector-cryptoAkif Ejaz20-139/+199
2024-06-11Merge pull request #1687 from riscv-software-src/flw-overlapAndrew Waterman13-124/+179
2024-06-11Validate contents of overlap list in CIAndrew Waterman1-13/+32
2024-06-11Separate RV32 and RV64 C instructions into separate filesAndrew Waterman10-33/+31
2024-06-11Improve hit rate of opcode cache to compensate for not mutating insn listAndrew Waterman2-17/+58
2024-06-11Compensate for perf loss of not mutating insn list by presorting itAndrew Waterman1-7/+7
2024-06-11Keep potentially overlapping instructions in order at head of listAndrew Waterman1-20/+32
2024-06-11Preserve the ordering of the instruction listAndrew Waterman1-22/+2
2024-06-11Add comments to overlap listAndrew Waterman1-0/+9
generated by cgit v1.1 at 2024-11-18 23:40:45 +0000