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author | Andrew Waterman <andrew@sifive.com> | 2024-06-10 18:24:44 -0700 |
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committer | Andrew Waterman <andrew@sifive.com> | 2024-06-11 13:51:14 -0700 |
commit | 4d2347868416442347a0c4a95152ebc106f10312 (patch) | |
tree | acc7f84064b0f4afd25ba0fd59f993fe9bc744ad | |
parent | 625e9451a75b3094597a1b1647cb71fa65bd8b98 (diff) | |
download | riscv-isa-sim-4d2347868416442347a0c4a95152ebc106f10312.zip riscv-isa-sim-4d2347868416442347a0c4a95152ebc106f10312.tar.gz riscv-isa-sim-4d2347868416442347a0c4a95152ebc106f10312.tar.bz2 |
Compensate for perf loss of not mutating insn list by presorting it
-rw-r--r-- | riscv/riscv.mk.in | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in index aef5939..689a198 100644 --- a/riscv/riscv.mk.in +++ b/riscv/riscv.mk.in @@ -1088,20 +1088,20 @@ riscv_insn_ext_zvk = \ $(riscv_insn_ext_zvksh) \ riscv_insn_list = \ - $(if $(HAVE_INT128),$(riscv_insn_ext_v),) \ - $(riscv_insn_ext_a) \ + $(riscv_insn_ext_i) \ + $(riscv_insn_ext_c) \ + $(riscv_insn_ext_f) \ + $(riscv_insn_ext_d) \ + $(riscv_insn_ext_m) \ $(riscv_insn_ext_b) \ + $(riscv_insn_ext_a) \ + $(if $(HAVE_INT128),$(riscv_insn_ext_v),) \ $(riscv_insn_ext_bf16) \ - $(riscv_insn_ext_c) \ $(riscv_insn_ext_cmo) \ - $(riscv_insn_ext_d) \ $(riscv_insn_ext_d_zfa) \ - $(riscv_insn_ext_f) \ $(riscv_insn_ext_f_zfa) \ $(riscv_insn_ext_h) \ - $(riscv_insn_ext_i) \ $(riscv_insn_ext_k) \ - $(riscv_insn_ext_m) \ $(riscv_insn_ext_q) \ $(riscv_insn_ext_q_zfa) \ $(riscv_insn_ext_zacas) \ |