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2022-10-17Merge branch 'master' into plic_uart_v1plic_uart_v1Andrew Waterman229-6973/+8037
2022-10-16Add interactive mode commands to read clint mtime/mtimecmpJerry Zhao3-0/+27
2022-10-14Add dump memory command to interactive modeJerry Zhao4-0/+29
2022-10-14Support command-line configuration of number of pmpregionsJerry Zhao5-2/+10
2022-10-14Merge pull request #1114 from riscv-software-src/data_optionalScott Johnson4-21/+21
In triggers, use optional<data> instead of {has_data, data}
2022-10-14In triggers, use optional<data> instead of {has_data, data}Andrew Waterman4-16/+17
2022-10-14Report error if an unsupported memory configuration is detectedParshintsev Anatoly2-9/+18
2022-10-13Remove unused field matched_t::dataAndrew Waterman2-5/+4
2022-10-13Merge pull request #1107 from riscv-software-src/simplify-ld-stAndrew Waterman3-179/+123
Simplify handling of load/store/fetch slow-path cases; fix two minor trigger bugs
2022-10-11Set tval on illegal subforms of aes64ks1iAndrew Waterman1-4/+1
h/t @YenHaoChen
2022-10-11Merge pull request #1109 from riscv-software-src/dm-no-abstract-fprAndrew Waterman3-2/+7
Add --dm-no-abstract-fpr option.
2022-10-10Fix disassembly of RV64 srai.uAndrew Waterman1-1/+7
The shift amount is 6 bits wide on RV64. As with the base ISA shifts, we ignore XLEN and unconditionally disassemble the 6-bit immediate on RV32. Partially reverts da93bdc435b985fd354e01c26470f64c33cecaa6
2022-10-07Add --dm-no-abstract-fpr option.Tim Newsome3-2/+7
Previously FPRs could always be accessed using abstract commands. I need this to get coverage of some OpenOCD code that I broke. (See https://github.com/riscv/riscv-openocd/pull/745)
2022-10-06Don't use reexecution as the means to implement trigger-afterAndrew Waterman3-10/+7
The scheme was based on the notion that memory accesses are idempotent up until the point the trigger would've been hit, which isn't true in the case of side-effecting loads and data-value triggers. Instead, check the trigger on the next instruction fetch. To keep the perf overhead minimal, perform this check on the I$ refill path, and ensure that path is taken by flushing the I$.
2022-10-06Fix endianness bug in fetch triggersAndrew Waterman1-2/+1
Instruction fetch is always little-endian.
2022-10-06DRY in checking triggersAndrew Waterman2-42/+28
2022-10-06Move uncommon-case fetch functionality into fetch_slow_pathAndrew Waterman2-25/+25
2022-10-06Move all uncommon-case store functionality into store_slow_pathAndrew Waterman2-65/+46
As a side effect, misaligned stores now behave the same as aligned stores with respect to triggers: only the first byte is checked.
2022-10-06Move all uncommon-case load functionality into load_slow_pathAndrew Waterman2-60/+41
As a side effect, misaligned loads now behave the same as aligned loads with respect to triggers: only the first byte is checked.
2022-10-05Remove unused variable to fix buildAndrew Waterman1-1/+0
2022-10-05Merge pull request #1105 from YenHaoChen/pr-trigger-priorityAndrew Waterman4-20/+47
Fix trigger priority
2022-10-05Merge pull request #1089 from riscv-software-src/fix-warningsAndrew Waterman47-134/+150
Fix or work around ignored-qualifiers, unused-function, unused-parameter, and unused-variable warnings
2022-10-05Engage non-virtual-dtor warning in CI testsAndrew Waterman1-1/+1
2022-10-04Fixed -Wnon-virtual-dtor warningsJerin Joy3-0/+6
Signed-off-by: Jerin Joy <joy@rivosinc.com>
2022-10-04Expand set of warnings we error on in CIAndrew Waterman1-1/+1
2022-10-04Suppress unused-variable warnings in spike mainAndrew Waterman1-1/+1
2022-10-04Fix unused-variable warnings in P-extension instruction definitionsAndrew Waterman1-1/+0
2022-10-04Suppress unused-variable warnings in P-extension macrosAndrew Waterman1-4/+4
2022-10-04Silence unused-variable warnings in auto-generated codeAndrew Waterman2-0/+8
2022-10-04Fix unused-variable warnings in softfloatAndrew Waterman1-4/+4
2022-10-04Suppress or fix unused-variable warnings in vector macrosAndrew Waterman1-36/+35
2022-10-04Suppress unused-variable warnings in vector instruction definitionsAndrew Waterman6-10/+0
2022-10-04Suppress unused-variable warnings in AES codeAndrew Waterman1-2/+2
2022-10-04Suppress most unused-variable warningsAndrew Waterman1-3/+3
2022-10-04Silence remaining unused-parameter warningsAndrew Waterman2-0/+8
Suppressing these individually would add too much clutter.
2022-10-04Suppress most unused variable warningsAndrew Waterman19-26/+28
2022-10-04Fix or work around other unused-parameter warnings in ancillary programsAndrew Waterman3-6/+7
2022-10-04Suppress unused-parameter warnings in spike mainAndrew Waterman1-16/+16
2022-10-04Add UNUSED macro for suppressing unused-parameter/variable warningsAndrew Waterman1-0/+2
2022-10-04Suppress unused-paramter warnings in softfloatAndrew Waterman1-0/+6
2022-10-04Delete unused parameter in rfb_t::fb_updateAndrew Waterman2-3/+3
2022-10-04Suppress several unused-parameter warnings in fesvrAndrew Waterman4-4/+5
2022-10-04Fix unused-function warning on sometimes-used function ctoAndrew Waterman1-1/+1
2022-10-04Delete functions that are actually unusedAndrew Waterman2-10/+0
2022-10-04Fix remaining ignored-qualifiers warningAndrew Waterman2-2/+2
2022-10-04Fix ignored-qualifiers warnings in get_field/set_field macrosAndrew Waterman1-2/+6
2022-10-04Rewrite READ_REG macro to avoid GNU statement expression extensionAndrew Waterman1-1/+1
This way, it can be used as an expression within a template argument.
2022-10-04Rewrite require macro so it can be used as an expressionAndrew Waterman1-1/+1
2022-10-04Fix trigger mcontrol.chain match issue #599 #627 (#1083)YenHaoChen1-1/+1
The variable chain_ok is used to indicate if the current trigger is suppressed by the trigger chain. A true value means the trigger is either un-chained or matches all previous triggers in the chain, and a false value means the trigger is chained and mismatches previous triggers. A false condition of variable chain_ok is missing. The false condition should be mcontrol.chain=1 and not matching; otherwise, the chain_ok=true (including initialization). The bug results in issues #559 and #627. Related issues: - https://github.com/riscv-software-src/riscv-isa-sim/issues/599 - https://github.com/riscv-software-src/riscv-isa-sim/issues/627 This PR fixes the issues #559 and #627.
2022-10-03Fix newly introduced Clang warningsAndrew Waterman1-7/+12
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