aboutsummaryrefslogtreecommitdiff
path: root/riscv/trap.h
diff options
context:
space:
mode:
Diffstat (limited to 'riscv/trap.h')
-rw-r--r--riscv/trap.h12
1 files changed, 3 insertions, 9 deletions
diff --git a/riscv/trap.h b/riscv/trap.h
index 46114ec..da8da65 100644
--- a/riscv/trap.h
+++ b/riscv/trap.h
@@ -72,24 +72,18 @@ class mem_trap_t : public trap_t
const char* name() { return "trap_"#x; } \
};
-#define DECLARE_MEM_NOGVA_TRAP(n, x) class trap_##x : public mem_trap_t { \
- public: \
- trap_##x(reg_t tval, reg_t tval2, reg_t tinst) : mem_trap_t(n, false, tval, tval2, tinst) {} \
- const char* name() { return "trap_"#x; } \
-};
-
#define DECLARE_MEM_GVA_TRAP(n, x) class trap_##x : public mem_trap_t { \
public: \
trap_##x(reg_t tval, reg_t tval2, reg_t tinst) : mem_trap_t(n, true, tval, tval2, tinst) {} \
const char* name() { return "trap_"#x; } \
};
-DECLARE_MEM_NOGVA_TRAP(CAUSE_MISALIGNED_FETCH, instruction_address_misaligned)
+DECLARE_MEM_TRAP(CAUSE_MISALIGNED_FETCH, instruction_address_misaligned)
DECLARE_MEM_TRAP(CAUSE_FETCH_ACCESS, instruction_access_fault)
DECLARE_INST_TRAP(CAUSE_ILLEGAL_INSTRUCTION, illegal_instruction)
DECLARE_INST_TRAP(CAUSE_BREAKPOINT, breakpoint)
-DECLARE_MEM_NOGVA_TRAP(CAUSE_MISALIGNED_LOAD, load_address_misaligned)
-DECLARE_MEM_NOGVA_TRAP(CAUSE_MISALIGNED_STORE, store_address_misaligned)
+DECLARE_MEM_TRAP(CAUSE_MISALIGNED_LOAD, load_address_misaligned)
+DECLARE_MEM_TRAP(CAUSE_MISALIGNED_STORE, store_address_misaligned)
DECLARE_MEM_TRAP(CAUSE_LOAD_ACCESS, load_access_fault)
DECLARE_MEM_TRAP(CAUSE_STORE_ACCESS, store_access_fault)
DECLARE_TRAP(CAUSE_USER_ECALL, user_ecall)