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-rw-r--r--riscv/sim.cc5
1 files changed, 5 insertions, 0 deletions
diff --git a/riscv/sim.cc b/riscv/sim.cc
index 9020da4..f1c1b3b 100644
--- a/riscv/sim.cc
+++ b/riscv/sim.cc
@@ -77,6 +77,11 @@ void sim_t::run(bool debug)
{
htif->wait_for_start();
+ // word 0 of memory contains the memory capacity in MB
+ mmu->store_uint32(0, memsz >> 20);
+ // word 1 of memory contains the core count
+ mmu->store_uint32(4, num_cores());
+
// start core 0
send_ipi(0);