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-rw-r--r--riscv/processor.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/riscv/processor.h b/riscv/processor.h
index 3bc1177..a675141 100644
--- a/riscv/processor.h
+++ b/riscv/processor.h
@@ -30,7 +30,6 @@ private:
reg_t XPR[NXPR];
freg_t FPR[NFPR];
reg_t pc;
- uint32_t fsr;
// counters
reg_t cycle;
@@ -38,12 +37,14 @@ private:
// privileged control registers
reg_t epc;
reg_t badvaddr;
- reg_t cause;
reg_t evec;
reg_t pcr_k0;
reg_t pcr_k1;
+ uint32_t cause;
+ uint32_t interrupts_pending;
uint32_t id;
uint32_t sr; // only modify the status register using set_sr()
+ uint32_t fsr;
uint32_t count;
uint32_t compare;