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-rw-r--r--riscv/mmu.cc8
1 files changed, 4 insertions, 4 deletions
diff --git a/riscv/mmu.cc b/riscv/mmu.cc
index 0b28f2f..8df38e5 100644
--- a/riscv/mmu.cc
+++ b/riscv/mmu.cc
@@ -180,7 +180,7 @@ reg_t mmu_t::walk(reg_t addr, access_type type, reg_t mode)
// check that physical address of PTE is legal
reg_t pte_addr = base + idx * vm.ptesize;
if (!sim->addr_is_mem(pte_addr))
- break;
+ throw trap_load_access_fault(addr);
void* ppte = sim->addr_to_mem(pte_addr);
reg_t pte = vm.ptesize == 4 ? *(uint32_t*)ppte : *(uint64_t*)ppte;
@@ -215,9 +215,9 @@ reg_t mmu_t::walk(reg_t addr, access_type type, reg_t mode)
fail:
switch (type) {
- case FETCH: throw trap_instruction_access_fault(addr);
- case LOAD: throw trap_load_access_fault(addr);
- case STORE: throw trap_store_access_fault(addr);
+ case FETCH: throw trap_instruction_page_fault(addr);
+ case LOAD: throw trap_load_page_fault(addr);
+ case STORE: throw trap_store_page_fault(addr);
default: abort();
}
}