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-rw-r--r--riscv/encoding.h49
1 files changed, 46 insertions, 3 deletions
diff --git a/riscv/encoding.h b/riscv/encoding.h
index 675b4f6..bcc1ace 100644
--- a/riscv/encoding.h
+++ b/riscv/encoding.h
@@ -4,7 +4,7 @@
/*
* This file is auto-generated by running 'make' in
- * https://github.com/riscv/riscv-opcodes (c55d30f)
+ * https://github.com/riscv/riscv-opcodes (8899b32)
*/
#ifndef RISCV_CSR_ENCODING_H
@@ -81,8 +81,9 @@
#define USTATUS_UPIE 0x00000010
#define MNSTATUS_NMIE 0x00000008
-#define MNSTATUS_MNPP 0x00001800
#define MNSTATUS_MNPV 0x00000080
+#define MNSTATUS_MNPELP 0x00000200
+#define MNSTATUS_MNPP 0x00001800
#define DCSR_XDEBUGVER (15U<<28)
#define DCSR_EXTCAUSE (7<<24)
@@ -110,6 +111,9 @@
#define DCSR_CAUSE_STEP 4
#define DCSR_CAUSE_HALT 5
#define DCSR_CAUSE_GROUP 6
+#define DCSR_CAUSE_EXTCAUSE 7
+
+#define DCSR_EXTCAUSE_CRITERR 0
#define MCONTROL_TYPE(xlen) (0xfULL<<((xlen)-4))
#define MCONTROL_DMODE(xlen) (1ULL<<((xlen)-5))
@@ -117,7 +121,7 @@
#define MCONTROL_SELECT (1<<19)
#define MCONTROL_TIMING (1<<18)
-#define MCONTROL_ACTION (0x3f<<12)
+#define MCONTROL_ACTION (0xf<<12)
#define MCONTROL_CHAIN (1<<11)
#define MCONTROL_MATCH (0xf<<7)
#define MCONTROL_M (1<<6)
@@ -178,11 +182,13 @@
#define MENVCFG_CBZE 0x00000080
#define MENVCFG_PMM 0x0000000300000000
#define MENVCFG_DTE 0x0800000000000000
+#define MENVCFG_CDE 0x1000000000000000
#define MENVCFG_ADUE 0x2000000000000000
#define MENVCFG_PBMTE 0x4000000000000000
#define MENVCFG_STCE 0x8000000000000000
#define MENVCFGH_DTE 0x08000000
+#define MENVCFGH_CDE 0x10000000
#define MENVCFGH_ADUE 0x20000000
#define MENVCFGH_PBMTE 0x40000000
#define MENVCFGH_STCE 0x80000000
@@ -191,6 +197,7 @@
#define MSTATEEN0_FCSR 0x00000002
#define MSTATEEN0_JVT 0x00000004
#define MSTATEEN0_CTR 0x0040000000000000
+#define MSTATEEN0_PRIV113 0x0100000000000000
#define MSTATEEN0_PRIV114 0x0080000000000000
#define MSTATEEN0_HCONTEXT 0x0200000000000000
#define MSTATEEN0_AIA 0x0800000000000000
@@ -199,6 +206,7 @@
#define MSTATEEN_HSTATEEN 0x8000000000000000
#define MSTATEEN0H_CTR 0x00400000
+#define MSTATEEN0H_PRIV113 0x01000000
#define MSTATEEN0H_PRIV114 0x00800000
#define MSTATEEN0H_HCONTEXT 0x02000000
#define MSTATEEN0H_AIA 0x08000000
@@ -220,6 +228,17 @@
#define MHPMEVENTH_MINH 0x40000000
#define MHPMEVENTH_OF 0x80000000
+#define MCOUNTEREN_CY_SHIFT 0
+#define MCOUNTEREN_TIME_SHIFT 1
+#define MCOUNTEREN_IR_SHIFT 2
+
+#define MCOUNTEREN_CY (1U << MCOUNTEREN_CY_SHIFT)
+#define MCOUNTEREN_TIME (1U << MCOUNTEREN_TIME_SHIFT)
+#define MCOUNTEREN_IR (1U << MCOUNTEREN_IR_SHIFT)
+
+#define MCOUNTINHIBIT_CY MCOUNTEREN_CY
+#define MCOUNTINHIBIT_IR MCOUNTEREN_IR
+
#define HENVCFG_FIOM 0x00000001
#define HENVCFG_LPE 0x00000004
#define HENVCFG_SSE 0x00000008
@@ -2126,6 +2145,20 @@
#define MASK_VOR_VV 0xfc00707f
#define MATCH_VOR_VX 0x28004057
#define MASK_VOR_VX 0xfc00707f
+#define MATCH_VQDOT_VV 0xb0002057
+#define MASK_VQDOT_VV 0xfc00707f
+#define MATCH_VQDOT_VX 0xb0006057
+#define MASK_VQDOT_VX 0xfc00707f
+#define MATCH_VQDOTSU_VV 0xa8002057
+#define MASK_VQDOTSU_VV 0xfc00707f
+#define MATCH_VQDOTSU_VX 0xa8006057
+#define MASK_VQDOTSU_VX 0xfc00707f
+#define MATCH_VQDOTU_VV 0xa0002057
+#define MASK_VQDOTU_VV 0xfc00707f
+#define MATCH_VQDOTU_VX 0xa0006057
+#define MASK_VQDOTU_VX 0xfc00707f
+#define MATCH_VQDOTUS_VX 0xb8006057
+#define MASK_VQDOTUS_VX 0xfc00707f
#define MATCH_VREDAND_VS 0x4002057
#define MASK_VREDAND_VS 0xfc00707f
#define MATCH_VREDMAX_VS 0x1c002057
@@ -2754,6 +2787,7 @@
#define CSR_VSIEH 0x214
#define CSR_VSIPH 0x254
#define CSR_VSTIMECMPH 0x25d
+#define CSR_HEDELEGH 0x612
#define CSR_HTIMEDELTAH 0x615
#define CSR_HIDELEGH 0x613
#define CSR_HVIENH 0x618
@@ -3005,6 +3039,7 @@
#define INSN_FIELD_MOP_RR_T_30 0x40000000
#define INSN_FIELD_MOP_RR_T_27_26 0xc000000
#define INSN_FIELD_C_MOP_T 0x700
+#define INSN_FIELD_RS2_EQ_RS1 0x1f00000
#endif
#ifdef DECLARE_INSN
DECLARE_INSN(add, MATCH_ADD, MASK_ADD)
@@ -3815,6 +3850,13 @@ DECLARE_INSN(vnsrl_wx, MATCH_VNSRL_WX, MASK_VNSRL_WX)
DECLARE_INSN(vor_vi, MATCH_VOR_VI, MASK_VOR_VI)
DECLARE_INSN(vor_vv, MATCH_VOR_VV, MASK_VOR_VV)
DECLARE_INSN(vor_vx, MATCH_VOR_VX, MASK_VOR_VX)
+DECLARE_INSN(vqdot_vv, MATCH_VQDOT_VV, MASK_VQDOT_VV)
+DECLARE_INSN(vqdot_vx, MATCH_VQDOT_VX, MASK_VQDOT_VX)
+DECLARE_INSN(vqdotsu_vv, MATCH_VQDOTSU_VV, MASK_VQDOTSU_VV)
+DECLARE_INSN(vqdotsu_vx, MATCH_VQDOTSU_VX, MASK_VQDOTSU_VX)
+DECLARE_INSN(vqdotu_vv, MATCH_VQDOTU_VV, MASK_VQDOTU_VV)
+DECLARE_INSN(vqdotu_vx, MATCH_VQDOTU_VX, MASK_VQDOTU_VX)
+DECLARE_INSN(vqdotus_vx, MATCH_VQDOTUS_VX, MASK_VQDOTUS_VX)
DECLARE_INSN(vredand_vs, MATCH_VREDAND_VS, MASK_VREDAND_VS)
DECLARE_INSN(vredmax_vs, MATCH_VREDMAX_VS, MASK_VREDMAX_VS)
DECLARE_INSN(vredmaxu_vs, MATCH_VREDMAXU_VS, MASK_VREDMAXU_VS)
@@ -4298,6 +4340,7 @@ DECLARE_CSR(stimecmph, CSR_STIMECMPH)
DECLARE_CSR(vsieh, CSR_VSIEH)
DECLARE_CSR(vsiph, CSR_VSIPH)
DECLARE_CSR(vstimecmph, CSR_VSTIMECMPH)
+DECLARE_CSR(hedelegh, CSR_HEDELEGH)
DECLARE_CSR(htimedeltah, CSR_HTIMEDELTAH)
DECLARE_CSR(hidelegh, CSR_HIDELEGH)
DECLARE_CSR(hvienh, CSR_HVIENH)