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-rwxr-xr-xdebug_rom/debug_rom.S11
-rw-r--r--debug_rom/debug_rom.h16
-rw-r--r--riscv/debug_module.cc35
-rw-r--r--riscv/debug_module.h6
-rw-r--r--riscv/decode.h12
-rw-r--r--riscv/devices.cc13
-rw-r--r--riscv/devices.h6
-rw-r--r--riscv/mmu.cc22
-rw-r--r--riscv/sim.cc9
-rw-r--r--riscv/sim.h3
10 files changed, 35 insertions, 98 deletions
diff --git a/debug_rom/debug_rom.S b/debug_rom/debug_rom.S
index a3339b4..832ac49 100755
--- a/debug_rom/debug_rom.S
+++ b/debug_rom/debug_rom.S
@@ -12,13 +12,11 @@
#define DSCRATCH 0x792
-# TODO: Should be 0x400
-#define DEBUG_RAM (-0x400)
+#define DEBUG_RAM 0x400
#define DEBUG_RAM_SIZE 64
-# TODO: Should be 0x100, 0x108
-#define SETHALTNOT (-0x100)
-#define CLEARDEBINT (-0x108)
+#define SETHALTNOT 0x100
+#define CLEARDEBINT 0x108
.global entry
.global resume
@@ -58,7 +56,8 @@ check_halt:
exit:
# Restore s0.
csrr s0, DSCRATCH
- eret
+ # TODO: dret?
+ mret
_entry:
diff --git a/debug_rom/debug_rom.h b/debug_rom/debug_rom.h
index b096c80..3ab78a1 100644
--- a/debug_rom/debug_rom.h
+++ b/debug_rom/debug_rom.h
@@ -1,16 +1,16 @@
static const unsigned char debug_rom_raw[] = {
- 0x6f, 0x00, 0xc0, 0x04, 0xf3, 0x24, 0x50, 0xf1, 0x23, 0x2c, 0x90, 0xee,
+ 0x6f, 0x00, 0xc0, 0x04, 0xf3, 0x24, 0x40, 0xf1, 0x23, 0x24, 0x90, 0x10,
0x0f, 0x00, 0xf0, 0x0f, 0xf3, 0x24, 0x00, 0xf1, 0x63, 0xc6, 0x04, 0x00,
- 0x83, 0x24, 0xc0, 0xc3, 0x6f, 0x00, 0x80, 0x01, 0x93, 0x94, 0x14, 0x00,
- 0x63, 0xc6, 0x04, 0x00, 0x83, 0x34, 0x80, 0xc3, 0x6f, 0x00, 0x80, 0x00,
+ 0x83, 0x24, 0xc0, 0x43, 0x6f, 0x00, 0x80, 0x01, 0x93, 0x94, 0x14, 0x00,
+ 0x63, 0xc6, 0x04, 0x00, 0x83, 0x34, 0x80, 0x43, 0x6f, 0x00, 0x80, 0x00,
0x13, 0x00, 0x00, 0x00, 0x73, 0x24, 0x00, 0x79, 0x13, 0x74, 0x84, 0x00,
0x63, 0x04, 0x04, 0x00, 0x6f, 0x00, 0x40, 0x05, 0x73, 0x24, 0x20, 0x79,
- 0x73, 0x00, 0x00, 0x10, 0x73, 0x10, 0x24, 0x79, 0x73, 0x24, 0x00, 0x79,
+ 0x73, 0x00, 0x20, 0x30, 0x73, 0x10, 0x24, 0x79, 0x73, 0x24, 0x00, 0x79,
0x13, 0x74, 0x74, 0x00, 0x13, 0x04, 0xd4, 0xff, 0x63, 0x16, 0x04, 0x02,
- 0x73, 0x24, 0x00, 0xf1, 0x63, 0x46, 0x04, 0x00, 0x23, 0x2e, 0x90, 0xc2,
- 0x67, 0x00, 0x00, 0xc0, 0x13, 0x14, 0x14, 0x00, 0x63, 0x46, 0x04, 0x00,
- 0x23, 0x3c, 0x90, 0xc2, 0x67, 0x00, 0x00, 0xc0, 0x13, 0x00, 0x00, 0x00,
- 0x67, 0x00, 0x00, 0xc0, 0x73, 0x24, 0x50, 0xf1, 0x23, 0x20, 0x80, 0xf0,
+ 0x73, 0x24, 0x00, 0xf1, 0x63, 0x46, 0x04, 0x00, 0x23, 0x2e, 0x90, 0x42,
+ 0x67, 0x00, 0x00, 0x40, 0x13, 0x14, 0x14, 0x00, 0x63, 0x46, 0x04, 0x00,
+ 0x23, 0x3c, 0x90, 0x42, 0x67, 0x00, 0x00, 0x40, 0x13, 0x00, 0x00, 0x00,
+ 0x67, 0x00, 0x00, 0x40, 0x73, 0x24, 0x40, 0xf1, 0x23, 0x20, 0x80, 0x10,
0x73, 0x60, 0x04, 0x79, 0x73, 0x24, 0x00, 0x79, 0x13, 0x74, 0x04, 0x40,
0xe3, 0x0c, 0x04, 0xfe, 0x6f, 0xf0, 0x1f, 0xfc
};
diff --git a/riscv/debug_module.cc b/riscv/debug_module.cc
index 2cda772..e3eb16b 100644
--- a/riscv/debug_module.cc
+++ b/riscv/debug_module.cc
@@ -5,19 +5,17 @@
#include "debug_rom/debug_rom.h"
-debug_module_t::debug_module_t()
-{
- /* Copy Debug ROM into the page. */
- memcpy(raw_page + DEBUG_ROM_START - DEBUG_START,
- debug_rom_raw, debug_rom_raw_len);
-}
-
bool debug_module_t::load(reg_t addr, size_t len, uint8_t* bytes)
{
addr = DEBUG_START + addr;
if (addr >= DEBUG_RAM_START && addr + len <= DEBUG_RAM_END) {
- memcpy(bytes, raw_page + addr - DEBUG_START, len);
+ memcpy(bytes, debug_ram + addr - DEBUG_RAM_START, len);
+ return true;
+ }
+
+ if (addr >= DEBUG_ROM_START && addr + len <= DEBUG_ROM_END) {
+ memcpy(bytes, debug_rom_raw + addr - DEBUG_ROM_START, len);
return true;
}
@@ -37,7 +35,7 @@ bool debug_module_t::store(reg_t addr, size_t len, const uint8_t* bytes)
}
if (addr >= DEBUG_RAM_START && addr + len <= DEBUG_RAM_END) {
- memcpy(raw_page + addr - DEBUG_START, bytes, len);
+ memcpy(debug_ram + addr - DEBUG_RAM_START, bytes, len);
return true;
} else if (len == 4 && addr == DEBUG_CLEARDEBINT) {
clear_interrupt(bytes[0] | (bytes[1] << 8) |
@@ -52,7 +50,7 @@ bool debug_module_t::store(reg_t addr, size_t len, const uint8_t* bytes)
void debug_module_t::ram_write32(unsigned int index, uint32_t value)
{
- char* base = raw_page + DEBUG_RAM_START - DEBUG_START + index * 4;
+ char* base = debug_ram + index * 4;
base[0] = value & 0xff;
base[1] = (value >> 8) & 0xff;
base[2] = (value >> 16) & 0xff;
@@ -63,25 +61,10 @@ uint32_t debug_module_t::ram_read32(unsigned int index)
{
// It'd be better for raw_page (and all memory) to be unsigned chars, but mem
// in sim_t is just chars, so I'm following that convention.
- unsigned char* base = (unsigned char*)
- (raw_page + DEBUG_RAM_START - DEBUG_START + index * 4);
+ unsigned char* base = (unsigned char*) (debug_ram + index * 4);
uint32_t value = ((uint32_t) base[0]) |
(((uint32_t) base[1]) << 8) |
(((uint32_t) base[2]) << 16) |
(((uint32_t) base[3]) << 24);
return value;
}
-
-char* debug_module_t::page(reg_t paddr)
-{
- fprintf(stderr, "dm::page(0x%lx)\n", paddr);
-
- assert(PGSHIFT == 12);
-
- if (paddr == (DEBUG_START & PGMASK)) {
- return raw_page;
- }
-
- fprintf(stderr, "ERROR: invalid page to debug module at 0x%lx\n", paddr);
- return NULL;
-}
diff --git a/riscv/debug_module.h b/riscv/debug_module.h
index 734a2a3..d7c1a87 100644
--- a/riscv/debug_module.h
+++ b/riscv/debug_module.h
@@ -9,11 +9,8 @@
class debug_module_t : public abstract_device_t
{
public:
- debug_module_t();
-
bool load(reg_t addr, size_t len, uint8_t* bytes);
bool store(reg_t addr, size_t len, const uint8_t* bytes);
- char* page(reg_t paddr);
void ram_write32(unsigned int index, uint32_t value);
uint32_t ram_read32(unsigned int index);
@@ -33,8 +30,7 @@ class debug_module_t : public abstract_device_t
private:
// Track which interrupts from module to debugger are set.
std::set<uint32_t> interrupt;
- // TODO: use PGSIZE, which requires solving some circular include dependencies.
- char raw_page[4096];
+ char debug_ram[DEBUG_RAM_SIZE];
};
#endif
diff --git a/riscv/decode.h b/riscv/decode.h
index 5732a0d..3a8b3a4 100644
--- a/riscv/decode.h
+++ b/riscv/decode.h
@@ -236,16 +236,16 @@ private:
#define DCSR_CAUSE_STEPPED 4
#define DCSR_CAUSE_HALT 5
-#define DEBUG_START 0xfffffffffffff000
-#define DEBUG_ROM_START 0xfffffffffffff800 // TODO: 0x800
+#define DEBUG_START 0x100
+#define DEBUG_ROM_START 0x800
#define DEBUG_ROM_RESUME (DEBUG_ROM_START + 4)
#define DEBUG_ROM_END (DEBUG_ROM_START + debug_rom_raw_len)
-#define DEBUG_RAM_START 0xfffffffffffffc00 // TODO: 0x400
+#define DEBUG_RAM_START 0x400
#define DEBUG_RAM_SIZE 64
#define DEBUG_RAM_END (DEBUG_RAM_START + DEBUG_RAM_SIZE)
-#define DEBUG_END 0xffffffffffffffff
-#define DEBUG_CLEARDEBINT 0xfffffffffffffef8
-#define DEBUG_SETHALTNOT 0xffffffffffffff00
+#define DEBUG_END 0xfff
+#define DEBUG_CLEARDEBINT 0x108
+#define DEBUG_SETHALTNOT 0x100
#define DEBUG_SIZE (DEBUG_END - DEBUG_START + 1)
#endif
diff --git a/riscv/devices.cc b/riscv/devices.cc
index e6f5d7d..4e88a1d 100644
--- a/riscv/devices.cc
+++ b/riscv/devices.cc
@@ -7,9 +7,12 @@ void bus_t::add_device(reg_t addr, abstract_device_t* dev)
bool bus_t::load(reg_t addr, size_t len, uint8_t* bytes)
{
+ fprintf(stderr, "bus load(0x%lx, %ld)\n", addr, len);
auto it = devices.lower_bound(-addr);
- if (it == devices.end())
+ if (it == devices.end()) {
+ fprintf(stderr, " -> false\n");
return false;
+ }
return it->second->load(addr - -it->first, len, bytes);
}
@@ -20,11 +23,3 @@ bool bus_t::store(reg_t addr, size_t len, const uint8_t* bytes)
return false;
return it->second->store(addr - -it->first, len, bytes);
}
-
-char* bus_t::page(reg_t paddr)
-{
- auto it = devices.lower_bound(-paddr);
- if (it == devices.end())
- return NULL;
- return it->second->page(paddr);
-}
diff --git a/riscv/devices.h b/riscv/devices.h
index 8378188..cb3b6d9 100644
--- a/riscv/devices.h
+++ b/riscv/devices.h
@@ -11,9 +11,6 @@ class abstract_device_t {
public:
virtual bool load(reg_t addr, size_t len, uint8_t* bytes) = 0;
virtual bool store(reg_t addr, size_t len, const uint8_t* bytes) = 0;
- // Return a pointer to the start of the page that addr falls in, or NULL if
- // there is no IO device at that address.
- virtual char* page(reg_t addr) { return NULL; }
virtual ~abstract_device_t() {}
};
@@ -21,9 +18,6 @@ class bus_t : public abstract_device_t {
public:
bool load(reg_t addr, size_t len, uint8_t* bytes);
bool store(reg_t addr, size_t len, const uint8_t* bytes);
- // Return a pointer to the start of the page that addr falls in, or NULL if
- // there is no IO device at that address.
- char* page(reg_t paddr);
void add_device(reg_t addr, abstract_device_t* dev);
private:
diff --git a/riscv/mmu.cc b/riscv/mmu.cc
index 514547c..dee41a9 100644
--- a/riscv/mmu.cc
+++ b/riscv/mmu.cc
@@ -51,28 +51,6 @@ reg_t mmu_t::translate(reg_t addr, access_type type)
return walk(addr, type, mode > PRV_U, pum) | (addr & (PGSIZE-1));
}
-const char* mmu_t::fill_from_mmio(reg_t vaddr, reg_t paddr)
-{
- reg_t rv_start = paddr & PGMASK;
- char* spike_start = proc->sim->mmio_page(rv_start);
-
- if (!spike_start)
- return NULL;
-
- // TODO: refactor with refill_tlb()
- reg_t idx = (vaddr >> PGSHIFT) % TLB_ENTRIES;
- reg_t expected_tag = vaddr >> PGSHIFT;
-
- if (tlb_load_tag[idx] != expected_tag) tlb_load_tag[idx] = -1;
- if (tlb_store_tag[idx] != expected_tag) tlb_store_tag[idx] = -1;
- if (tlb_insn_tag[idx] != expected_tag) tlb_insn_tag[idx] = -1;
-
- tlb_insn_tag[idx] = expected_tag;
- tlb_data[idx] = spike_start - DEBUG_START;
-
- return spike_start + (paddr & ~PGMASK);
-}
-
const uint16_t* mmu_t::fetch_slow_path(reg_t vaddr)
{
reg_t paddr = translate(vaddr, FETCH);
diff --git a/riscv/sim.cc b/riscv/sim.cc
index b09e720..4b4eed4 100644
--- a/riscv/sim.cc
+++ b/riscv/sim.cc
@@ -42,6 +42,8 @@ sim_t::sim_t(const char* isa, size_t nprocs, size_t mem_mb, bool halted,
fprintf(stderr, "warning: only got %lu bytes of target mem (wanted %lu)\n",
(unsigned long)memsz, (unsigned long)memsz0);
+ bus.add_device(DEBUG_START, &debug_module);
+
debug_mmu = new mmu_t(this, NULL);
for (size_t i = 0; i < procs.size(); i++) {
@@ -52,8 +54,6 @@ sim_t::sim_t(const char* isa, size_t nprocs, size_t mem_mb, bool halted,
rtc.reset(new rtc_t(procs));
make_config_string();
-
- bus.add_device(DEBUG_START, &debug_module);
}
sim_t::~sim_t()
@@ -149,11 +149,6 @@ bool sim_t::mmio_store(reg_t addr, size_t len, const uint8_t* bytes)
return bus.store(addr, len, bytes);
}
-char* sim_t::mmio_page(reg_t addr)
-{
- return bus.page(addr);
-}
-
void sim_t::make_config_string()
{
reg_t rtc_addr = EXT_IO_BASE;
diff --git a/riscv/sim.h b/riscv/sim.h
index d3c9a6b..bd42419 100644
--- a/riscv/sim.h
+++ b/riscv/sim.h
@@ -68,9 +68,6 @@ private:
reg_t mem_to_addr(char* x) { return x - mem + DRAM_BASE; }
bool mmio_load(reg_t addr, size_t len, uint8_t* bytes);
bool mmio_store(reg_t addr, size_t len, const uint8_t* bytes);
- // Return a pointer to the start of the page that addr falls in, or NULL if
- // there is no IO device at that address.
- char* mmio_page(reg_t addr);
void make_config_string();
// presents a prompt for introspection into the simulation
generated by cgit v1.1 at 2024-11-18 09:42:00 +0000