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-rwxr-xr-xdebug_rom/debug_rom.S30
-rw-r--r--debug_rom/debug_rom.h6
-rw-r--r--riscv/encoding.h28
3 files changed, 28 insertions, 36 deletions
diff --git a/debug_rom/debug_rom.S b/debug_rom/debug_rom.S
index c164eeb..0d97270 100755
--- a/debug_rom/debug_rom.S
+++ b/debug_rom/debug_rom.S
@@ -5,13 +5,6 @@
# TODO: Update these constants once they're finalized in the doc.
-#define DCSR 0x790
-#define DCSR_CAUSE_DEBINT 3
-#define DCSR_HALT_OFFSET 3
-#define DCSR_DEBUGINT_OFFSET 10
-
-#define DSCRATCH 0x792
-
#define DEBUG_RAM 0x400
#define DEBUG_RAM_SIZE 64
@@ -63,26 +56,25 @@ restore_128:
sw s0, (DEBUG_RAM + DEBUG_RAM_SIZE - 4)(zero)
check_halt:
- csrr s0, DCSR
- andi s0, s0, (1<<DCSR_HALT_OFFSET)
+ csrr s0, CSR_DCSR
+ andi s0, s0, DCSR_HALT
beqz s0, exit
j wait_for_interrupt
exit:
# Restore s0.
- csrr s0, DSCRATCH
- dret
-
+ csrr s0, CSR_DSCRATCH
+ .word 0x79200073 # TODO: dret
_entry:
# Save s0 in DSCRATCH
- csrw DSCRATCH, s0
+ csrw CSR_DSCRATCH, s0
# Check why we're here
- csrr s0, DCSR
+ csrr s0, CSR_DCSR
# cause is in bits 2:0 of dcsr
- andi s0, s0, 7
- addi s0, s0, -DCSR_CAUSE_DEBINT
+ andi s0, s0, DCSR_CAUSE
+ addi s0, s0, -DCSR_CAUSE_DEBUGINT
bnez s0, spontaneous_halt
jdebugram:
@@ -106,11 +98,11 @@ save_128:
spontaneous_halt:
csrr s0, CSR_MHARTID
sw s0, SETHALTNOT(zero)
- csrsi DCSR, (1<<DCSR_HALT_OFFSET)
+ csrsi CSR_DCSR, DCSR_HALT
wait_for_interrupt:
- csrr s0, DCSR
- andi s0, s0, (1<<DCSR_DEBUGINT_OFFSET)
+ csrr s0, CSR_DCSR
+ andi s0, s0, DCSR_DEBUGINT
beqz s0, wait_for_interrupt
j jdebugram
diff --git a/debug_rom/debug_rom.h b/debug_rom/debug_rom.h
index c429b22..7463677 100644
--- a/debug_rom/debug_rom.h
+++ b/debug_rom/debug_rom.h
@@ -7,13 +7,13 @@ static const unsigned char debug_rom_raw[] = {
0x6f, 0x00, 0xc0, 0x00, 0x13, 0x00, 0x00, 0x00, 0x23, 0x2e, 0x80, 0x42,
0x73, 0x24, 0x00, 0x79, 0x13, 0x74, 0x84, 0x00, 0x63, 0x04, 0x04, 0x00,
0x6f, 0x00, 0x80, 0x05, 0x73, 0x24, 0x20, 0x79, 0x73, 0x00, 0x20, 0x79,
- 0x73, 0x10, 0x24, 0x79, 0x73, 0x24, 0x00, 0x79, 0x13, 0x74, 0x74, 0x00,
- 0x13, 0x04, 0xd4, 0xff, 0x63, 0x18, 0x04, 0x02, 0x0f, 0x10, 0x00, 0x00,
+ 0x73, 0x10, 0x24, 0x79, 0x73, 0x24, 0x00, 0x79, 0x13, 0x74, 0x04, 0x1c,
+ 0x13, 0x04, 0x04, 0xf4, 0x63, 0x18, 0x04, 0x02, 0x0f, 0x10, 0x00, 0x00,
0x73, 0x24, 0x00, 0xf1, 0x63, 0x46, 0x04, 0x00, 0x23, 0x2e, 0x90, 0x42,
0x67, 0x00, 0x00, 0x40, 0x13, 0x14, 0x14, 0x00, 0x63, 0x46, 0x04, 0x00,
0x23, 0x3c, 0x90, 0x42, 0x67, 0x00, 0x00, 0x40, 0x13, 0x00, 0x00, 0x00,
0x67, 0x00, 0x00, 0x40, 0x73, 0x24, 0x40, 0xf1, 0x23, 0x20, 0x80, 0x10,
- 0x73, 0x60, 0x04, 0x79, 0x73, 0x24, 0x00, 0x79, 0x13, 0x74, 0x04, 0x40,
+ 0x73, 0x60, 0x04, 0x79, 0x73, 0x24, 0x00, 0x79, 0x13, 0x74, 0x04, 0x02,
0xe3, 0x0c, 0x04, 0xfe, 0x6f, 0xf0, 0xdf, 0xfb
};
static const unsigned int debug_rom_raw_len = 188;
diff --git a/riscv/encoding.h b/riscv/encoding.h
index e3371af..0f1926a 100644
--- a/riscv/encoding.h
+++ b/riscv/encoding.h
@@ -33,21 +33,21 @@
#define SSTATUS32_SD 0x80000000
#define SSTATUS64_SD 0x8000000000000000
-#define DCSR_XDEBUGVER (3<<29)
-#define DCSR_HWBPCOUNT (0xfff<<17)
-#define DCSR_PRV (3<<14)
-#define DCSR_NDRESET (1<<13)
-#define DCSR_FULLRESET (1<<12)
-#define DCSR_STEP (1<<11)
-#define DCSR_DEBUGINT (1<<10)
-#define DCSR_STOPCYCLE (1<<9)
-#define DCSR_STOPTIME (1<<8)
-#define DCSR_EBREAKM (1<<7)
-#define DCSR_EBREAKH (1<<6)
-#define DCSR_EBREAKS (1<<5)
-#define DCSR_EBREAKU (1<<4)
+#define DCSR_XDEBUGVER (3<<30)
+#define DCSR_NDRESET (1<<29)
+#define DCSR_FULLRESET (1<<28)
+#define DCSR_HWBPCOUNT (0xfff<<16)
+#define DCSR_EBREAKM (1<<15)
+#define DCSR_EBREAKH (1<<14)
+#define DCSR_EBREAKS (1<<13)
+#define DCSR_EBREAKU (1<<12)
+#define DCSR_STOPCYCLE (1<<10)
+#define DCSR_STOPTIME (1<<9)
+#define DCSR_CAUSE (7<<6)
+#define DCSR_DEBUGINT (1<<5)
#define DCSR_HALT (1<<3)
-#define DCSR_CAUSE 7
+#define DCSR_STEP (1<<2)
+#define DCSR_PRV (3<<0)
#define DCSR_CAUSE_NONE 0
#define DCSR_CAUSE_SWBP 1