diff options
| -rw-r--r-- | README.md | 2 | ||||
| -rw-r--r-- | riscv/encoding.h | 2 | ||||
| -rw-r--r-- | riscv/mmu.cc | 2 |
3 files changed, 3 insertions, 3 deletions
@@ -25,7 +25,7 @@ Spike supports the following RISC-V ISA features: - Conformance to both RVWMO and RVTSO (Spike is sequentially consistent) - Machine, Supervisor, and User modes, v1.11 - Hypervisor extension, v0.6.1 - - Zsn extension, v0.1 + - Svnapot extension, v0.1 - Debug v0.14 Versioning and APIs diff --git a/riscv/encoding.h b/riscv/encoding.h index 5e502b8..160dc29 100644 --- a/riscv/encoding.h +++ b/riscv/encoding.h @@ -227,7 +227,7 @@ #define PTE_A 0x040 /* Accessed */ #define PTE_D 0x080 /* Dirty */ #define PTE_SOFT 0x300 /* Reserved for Software */ -#define PTE_N 0x4000000000000000 /* Zsn: NAPOT translation contiguity */ +#define PTE_N 0x4000000000000000 /* Svnapot: NAPOT translation contiguity */ #define PTE_PPN_SHIFT 10 diff --git a/riscv/mmu.cc b/riscv/mmu.cc index 77d1cf1..431dd44 100644 --- a/riscv/mmu.cc +++ b/riscv/mmu.cc @@ -432,7 +432,7 @@ reg_t mmu_t::walk(reg_t addr, access_type type, reg_t mode, bool virt, bool mxr) if ((pte & ad) != ad) break; #endif - // for superpage or Zsn NAPOT mappings, make a fake leaf PTE for the TLB's benefit. + // for superpage or Svnapot NAPOT mappings, make a fake leaf PTE for the TLB's benefit. reg_t vpn = addr >> PGSHIFT; int napot_bits = ((pte & PTE_N) ? (ctz(ppn) + 1) : 0); |