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| author | Andrew Waterman <aswaterman@gmail.com> | 2015-01-02 23:17:44 -0800 |
|---|---|---|
| committer | Andrew Waterman <aswaterman@gmail.com> | 2015-01-02 23:17:44 -0800 |
| commit | c42146fbe46827af81fde8542212dc3c6e69aa57 (patch) | |
| tree | b8b1a649086f9fc0d4ebf82e1e438567c32cadbe /spike_main | |
| parent | ec297672b0c9d58d1ee6c2ac976ccf28863bd3c2 (diff) | |
| download | riscv-isa-sim-c42146fbe46827af81fde8542212dc3c6e69aa57.zip riscv-isa-sim-c42146fbe46827af81fde8542212dc3c6e69aa57.tar.gz riscv-isa-sim-c42146fbe46827af81fde8542212dc3c6e69aa57.tar.bz2 | |
Require 4-byte instruction alignment until RVC is reimplemented
Diffstat (limited to 'spike_main')
0 files changed, 0 insertions, 0 deletions