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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-06-16 21:40:00 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-06-16 21:41:28 -0700 |
| commit | 0ea56186d527433c21cf76e2d2a6a53a8d9695dc (patch) | |
| tree | 151cb3553ce565e7a2c52145a554db0c3f76d354 /spike_main | |
| parent | 939128f1e0a10c6c770bf15394d3c8b0606eb059 (diff) | |
| download | riscv-isa-sim-0ea56186d527433c21cf76e2d2a6a53a8d9695dc.zip riscv-isa-sim-0ea56186d527433c21cf76e2d2a6a53a8d9695dc.tar.gz riscv-isa-sim-0ea56186d527433c21cf76e2d2a6a53a8d9695dc.tar.bz2 | |
rvv: disasm: fix vwadd.wx operand
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'spike_main')
| -rw-r--r-- | spike_main/disasm.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/spike_main/disasm.cc b/spike_main/disasm.cc index d2947ee..9ab8dd4 100644 --- a/spike_main/disasm.cc +++ b/spike_main/disasm.cc @@ -805,7 +805,7 @@ disassembler_t::disassembler_t(int xlen) #define DISASM_OPIV_W___INSN(name, sign) \ add_insn(new disasm_insn_t(#name ".wv", match_##name##_wv, mask_##name##_wv, \ {&vd, &vs2, &vs1, &opt, &vm})); \ - add_insn(new disasm_insn_t(#name ".wx", match_##name##_wv, mask_##name##_wv, \ + add_insn(new disasm_insn_t(#name ".wx", match_##name##_wx, mask_##name##_wx, \ {&vd, &vs2, &xrs1, &opt, &vm})); #define DISASM_OPIV_M___INSN(name, sign) \ |