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| author | Andrew Waterman <andrew@sifive.com> | 2018-02-21 13:25:44 -0800 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2018-02-21 15:35:19 -0800 |
| commit | 0329b0741a698f102d64be4f0538427978bacb83 (patch) | |
| tree | 5270e8966e36c6d76c280d22ec78014eb4b75a04 /spike_main | |
| parent | c746388b542eacd2586acfbc0a742b08a5c0bd6f (diff) | |
| download | riscv-isa-sim-0329b0741a698f102d64be4f0538427978bacb83.zip riscv-isa-sim-0329b0741a698f102d64be4f0538427978bacb83.tar.gz riscv-isa-sim-0329b0741a698f102d64be4f0538427978bacb83.tar.bz2 | |
Don't allow 32-bit instructions to take up multiple slots in I$
I$ indices now maintain a 1:N relationship with PCs. This is somewhat
faster and also simpler.
Diffstat (limited to 'spike_main')
0 files changed, 0 insertions, 0 deletions