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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2019-06-06 01:54:38 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2019-06-14 07:36:45 -0700 |
| commit | 004649e9e5d71d0a3ebb1e4d70711999aca91cbf (patch) | |
| tree | d4992148a971eaa5fa295599fcf726c8eb69722c /spike_main | |
| parent | 3d7c84220971c6b1aee6e28779c8ebc71276d26a (diff) | |
| download | riscv-isa-sim-004649e9e5d71d0a3ebb1e4d70711999aca91cbf.zip riscv-isa-sim-004649e9e5d71d0a3ebb1e4d70711999aca91cbf.tar.gz riscv-isa-sim-004649e9e5d71d0a3ebb1e4d70711999aca91cbf.tar.bz2 | |
rvv: add configuration and command-line option
1. configure option "--with-varch"
the option defines the default u-arch implementatiton-decided parameter
VLEN: vector register length in bit
SLEN: striping distance in bit
ELEN: max element size in bit
ex: --with-vector=v128:e32:s128
2. add __int128_t type checking
3. add --varch command option and help message
ex: --varch=v512:e64:s512
Signed-off-by: Dave Wen <dave.wen@sifive.com>
Diffstat (limited to 'spike_main')
| -rw-r--r-- | spike_main/spike.cc | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/spike_main/spike.cc b/spike_main/spike.cc index c047211..5da6210 100644 --- a/spike_main/spike.cc +++ b/spike_main/spike.cc @@ -29,6 +29,7 @@ static void help(int exit_code = 1) fprintf(stderr, " -h, --help Print this help message\n"); fprintf(stderr, " -H Start halted, allowing a debugger to connect\n"); fprintf(stderr, " --isa=<name> RISC-V ISA string [default %s]\n", DEFAULT_ISA); + fprintf(stderr, " --varch=<name> RISC-V Vector uArch string [default %s]\n", DEFAULT_VARCH); fprintf(stderr, " --pc=<address> Override ELF entry point\n"); fprintf(stderr, " --hartids=<a,b,...> Explicitly specify hartids, default is 0,1,...\n"); fprintf(stderr, " --ic=<S>:<W>:<B> Instantiate a cache model with S sets,\n"); @@ -109,6 +110,7 @@ int main(int argc, char** argv) bool log_cache = false; std::function<extension_t*()> extension; const char* isa = DEFAULT_ISA; + const char* varch = DEFAULT_VARCH; uint16_t rbb_port = 0; bool use_rbb = false; unsigned dmi_rti = 0; @@ -153,6 +155,7 @@ int main(int argc, char** argv) parser.option(0, "l2", 1, [&](const char* s){l2.reset(cache_sim_t::construct(s, "L2$"));}); parser.option(0, "log-cache-miss", 0, [&](const char* s){log_cache = true;}); parser.option(0, "isa", 1, [&](const char* s){isa = s;}); + parser.option(0, "varch", 1, [&](const char* s){varch = s;}); parser.option(0, "extension", 1, [&](const char* s){extension = find_extension(s);}); parser.option(0, "dump-dts", 0, [&](const char *s){dump_dts = true;}); parser.option(0, "disable-dtb", 0, [&](const char *s){dtb_enabled = false;}); |