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| author | Andrew Waterman <andrew@sifive.com> | 2022-06-06 20:35:35 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2022-06-06 20:54:17 -0700 |
| commit | d2020b3256cf9a832cbbfe7a32c5753abe75cb7d (patch) | |
| tree | 7ecf51581bb6132395cbf355142581c8c9c3dcdf /spike_dasm | |
| parent | 898c0dd6a0c7bfe5e332ab0b6c00b3fd3b3d06a0 (diff) | |
| download | riscv-isa-sim-d2020b3256cf9a832cbbfe7a32c5753abe75cb7d.zip riscv-isa-sim-d2020b3256cf9a832cbbfe7a32c5753abe75cb7d.tar.gz riscv-isa-sim-d2020b3256cf9a832cbbfe7a32c5753abe75cb7d.tar.bz2 | |
Zero-extend instructions in spike-dasm
...since we no longer rely on their being sign-extended.
Diffstat (limited to 'spike_dasm')
| -rw-r--r-- | spike_dasm/spike-dasm.cc | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/spike_dasm/spike-dasm.cc b/spike_dasm/spike-dasm.cc index c4fc840..8c85ef1 100644 --- a/spike_dasm/spike-dasm.cc +++ b/spike_dasm/spike-dasm.cc @@ -50,14 +50,10 @@ int main(int argc, char** argv) continue; char* endp; - int64_t bits = strtoull(&s[pos], &endp, 16); + insn_bits_t bits = strtoull(&s[pos], &endp, 16); if (*endp != ')') continue; - size_t nbits = 4 * (endp - &s[pos]); - if (nbits < 64) - bits = bits << (64 - nbits) >> (64 - nbits); - string dis = disassembler->disassemble(bits); s = s.substr(0, start) + dis + s.substr(endp - &s[0] + 1); pos = start + dis.length(); |