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authorAtul Khare <atulkhare@rivosinc.com>2023-05-17 12:40:01 -0700
committerAtul Khare <atulkhare@rivosinc.com>2023-05-24 09:15:27 -0700
commit31f5ede662303183d93f80e869379e49b7a01608 (patch)
treeb1f76dd7e83430ac0626ff66fdcc8ae605d6c177 /riscv/triggers.cc
parentddae0f25a89f2d04d76a222505d00c39dc511505 (diff)
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Enhance mode_match() functionality
The current version of mode_match() is based on the current privilege level. This adds an explicit privilege and virtual mode parameters in anticipation of an upcoming patch for matching trap triggers.
Diffstat (limited to 'riscv/triggers.cc')
-rw-r--r--riscv/triggers.cc11
1 files changed, 6 insertions, 5 deletions
diff --git a/riscv/triggers.cc b/riscv/triggers.cc
index 86dcc81..51dcf18 100644
--- a/riscv/triggers.cc
+++ b/riscv/triggers.cc
@@ -56,15 +56,16 @@ void trigger_t::tdata3_write(processor_t * const proc, const reg_t val) noexcept
}
bool trigger_t::common_match(processor_t * const proc) const noexcept {
- return mode_match(proc->get_state()) && textra_match(proc);
+ auto state = proc->get_state();
+ return mode_match(state->prv, state->v) && textra_match(proc);
}
-bool trigger_t::mode_match(state_t * const state) const noexcept
+bool trigger_t::mode_match(reg_t prv, bool v) const noexcept
{
- switch (state->prv) {
+ switch (prv) {
case PRV_M: return m;
- case PRV_S: return state->v ? vs : s;
- case PRV_U: return state->v ? vu : u;
+ case PRV_S: return v ? vs : s;
+ case PRV_U: return v ? vu : u;
default: assert(false);
}
}