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| author | Michal Terepeta <michalt@google.com> | 2023-07-17 06:06:31 +0000 |
|---|---|---|
| committer | Michal Terepeta <michalt@google.com> | 2023-07-20 06:04:55 +0000 |
| commit | cb013516665addb45dadd197028762fd3757bdb0 (patch) | |
| tree | 8dd1e99d5cb3010ff1f198ba04040541be7f8e32 /riscv/sim.h | |
| parent | e85d2923a5e4fdd7d61cd0cc9f0685c97f451769 (diff) | |
| download | riscv-isa-sim-cb013516665addb45dadd197028762fd3757bdb0.zip riscv-isa-sim-cb013516665addb45dadd197028762fd3757bdb0.tar.gz riscv-isa-sim-cb013516665addb45dadd197028762fd3757bdb0.tar.bz2 | |
Introduce `abstract_mem_t` to allow custom implementations
This change allows to create custom implementations of `abstract_mem_t`
and inject them when constructing `sim_t`. The current `mem_t`
implementation remains unchanged.
Fixes #1408.
Diffstat (limited to 'riscv/sim.h')
| -rw-r--r-- | riscv/sim.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/riscv/sim.h b/riscv/sim.h index 2b58975..2455263 100644 --- a/riscv/sim.h +++ b/riscv/sim.h @@ -26,7 +26,7 @@ class sim_t : public htif_t, public simif_t { public: sim_t(const cfg_t *cfg, bool halted, - std::vector<std::pair<reg_t, mem_t*>> mems, + std::vector<std::pair<reg_t, abstract_mem_t*>> mems, std::vector<const device_factory_t*> plugin_device_factories, const std::vector<std::string>& args, const debug_module_config_t &dm_config, const char *log_path, @@ -68,7 +68,7 @@ public: private: isa_parser_t isa; const cfg_t * const cfg; - std::vector<std::pair<reg_t, mem_t*>> mems; + std::vector<std::pair<reg_t, abstract_mem_t*>> mems; std::vector<processor_t*> procs; std::map<size_t, processor_t*> harts; std::pair<reg_t, reg_t> initrd_range; |