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author | sthiruva <sthiruva@gmail.com> | 2020-09-30 00:39:24 +0530 |
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committer | GitHub <noreply@github.com> | 2020-09-29 12:09:24 -0700 |
commit | 4baf970f1b151400152c43559e601625dc03bd67 (patch) | |
tree | 159fc751c4bc0044a399343ad43d31e6cad23b52 /riscv/sim.h | |
parent | e7cdd757248358235f3231cecf6aafdf23201d4e (diff) | |
download | riscv-isa-sim-4baf970f1b151400152c43559e601625dc03bd67.zip riscv-isa-sim-4baf970f1b151400152c43559e601625dc03bd67.tar.gz riscv-isa-sim-4baf970f1b151400152c43559e601625dc03bd67.tar.bz2 |
Adding symbol lookup when --enable-commitlog is enabled (#558)
* Adding symbol lookup when --enable-commitlog is enabled
* Removed the #ifdef RISCV_ENABLE_COMMITLOG for all get_symbol related function
Only retained the in processor.cc where it is called.
Co-authored-by: Shajid Thiruvathodi <sthiruva@valtrix.in>
Diffstat (limited to 'riscv/sim.h')
-rw-r--r-- | riscv/sim.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/riscv/sim.h b/riscv/sim.h index c6e5582..c7e3de4 100644 --- a/riscv/sim.h +++ b/riscv/sim.h @@ -94,6 +94,8 @@ private: void make_dtb(); void set_rom(); + const char* get_symbol(uint64_t addr); + // presents a prompt for introspection into the simulation void interactive(); |