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| author | Andrew Waterman <andrew@sifive.com> | 2021-09-17 19:10:11 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2021-09-17 19:10:11 -0700 |
| commit | 22affb92b73a383115d22b0c85da1564e09a7f7b (patch) | |
| tree | 621042df524dc306be724d273a74f5dc2e13dece /riscv/sim.h | |
| parent | b4f76106d241311788082207ca0ac9028564accd (diff) | |
| download | riscv-isa-sim-22affb92b73a383115d22b0c85da1564e09a7f7b.zip riscv-isa-sim-22affb92b73a383115d22b0c85da1564e09a7f7b.tar.gz riscv-isa-sim-22affb92b73a383115d22b0c85da1564e09a7f7b.tar.bz2 | |
Use RIAA pattern in manipulating ostream flags
sout is renamed to sout_ to reduce likelihood programmers accidentally use it.
Diffstat (limited to 'riscv/sim.h')
| -rw-r--r-- | riscv/sim.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/sim.h b/riscv/sim.h index cf50de5..714b766 100644 --- a/riscv/sim.h +++ b/riscv/sim.h @@ -111,7 +111,7 @@ private: string rin(streambuf *bout_ptr); // read input command string void wout(streambuf *bout_ptr); // write output to socket #endif - ostream sout; // used for socket and terminal interface + ostream sout_; // used for socket and terminal interface processor_t* get_core(const std::string& i); void step(size_t n); // step through simulation |