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authorAndrew Waterman <waterman@cs.berkeley.edu>2013-07-12 18:23:05 -0700
committerAndrew Waterman <waterman@cs.berkeley.edu>2013-07-12 18:24:07 -0700
commit790db6c910927a1d5318e55d7d5232164430616d (patch)
tree3f3d181fa6d9ce507f48cdca59777cb07ffc8669 /riscv/sim.cc
parentb6da69bb3e38ca27b5826bb36f68fd6426f9e688 (diff)
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Exit cleanly from debug console
Diffstat (limited to 'riscv/sim.cc')
-rw-r--r--riscv/sim.cc23
1 files changed, 15 insertions, 8 deletions
diff --git a/riscv/sim.cc b/riscv/sim.cc
index 8df943c..2044235 100644
--- a/riscv/sim.cc
+++ b/riscv/sim.cc
@@ -13,9 +13,9 @@
# define mmap mmap64
#endif
-sim_t::sim_t(int _nprocs, int mem_mb, const std::vector<std::string>& args)
+sim_t::sim_t(size_t _nprocs, size_t mem_mb, const std::vector<std::string>& args)
: htif(new htif_isasim_t(this, args)),
- procs(_nprocs), current_step(0), current_proc(0)
+ procs(_nprocs), current_step(0), current_proc(0), debug(false)
{
// allocate target machine's memory, shrinking it as necessary
// until the allocation succeeds
@@ -68,20 +68,20 @@ reg_t sim_t::get_scr(int which)
{
switch (which)
{
- case 0: return num_cores();
+ case 0: return procs.size();
case 1: return memsz >> 20;
default: return -1;
}
}
-void sim_t::run(bool debug)
+void sim_t::run()
{
while (!htif->done())
{
- if(!debug)
- step(INTERLEAVE, false);
- else
+ if (debug)
interactive();
+ else
+ step(INTERLEAVE, false);
}
}
@@ -99,8 +99,15 @@ void sim_t::step(size_t n, bool noisy)
{
current_step = 0;
procs[current_proc]->mmu.yield_load_reservation();
- if (++current_proc == num_cores())
+ if (++current_proc == procs.size())
current_proc = 0;
}
}
}
+
+void sim_t::stop()
+{
+ procs[0]->tohost = 1;
+ while (!htif->done())
+ htif->tick();
+}