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author | Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU> | 2010-11-02 16:00:37 -0700 |
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committer | Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU> | 2010-11-21 16:54:33 -0800 |
commit | 3f144b12ed35f7fee4c7faf937e144807acb1e2b (patch) | |
tree | f2e64e6b6a31d2ebdefa2ba2558ee1d87a760184 /riscv/sim.cc | |
parent | 68f81d8f487c56a71ab2f374114fb513b55dce86 (diff) | |
download | riscv-isa-sim-3f144b12ed35f7fee4c7faf937e144807acb1e2b.zip riscv-isa-sim-3f144b12ed35f7fee4c7faf937e144807acb1e2b.tar.gz riscv-isa-sim-3f144b12ed35f7fee4c7faf937e144807acb1e2b.tar.bz2 |
[xcc, sim, pk] link register is now x1
Diffstat (limited to 'riscv/sim.cc')
-rw-r--r-- | riscv/sim.cc | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/riscv/sim.cc b/riscv/sim.cc index ca10e09..8b04aa2 100644 --- a/riscv/sim.cc +++ b/riscv/sim.cc @@ -225,6 +225,9 @@ reg_t sim_t::get_mem(const std::vector<std::string>& args) throw trap_illegal_instruction; reg_t addr = strtol(args[0].c_str(),NULL,16), val; + if(addr == LONG_MAX) + addr = strtoul(args[0].c_str(),NULL,16); + mmu_t mmu(mem,memsz); switch(addr % 8) { @@ -257,6 +260,8 @@ void sim_t::interactive_until(const std::string& cmd, const std::vector<std::str std::string scmd = args[0]; reg_t val = strtol(args[args.size()-1].c_str(),NULL,16); + if(val == LONG_MAX) + val = strtoul(args[args.size()-1].c_str(),NULL,16); std::vector<std::string> args2; args2 = std::vector<std::string>(args.begin()+1,args.end()-1); |