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author | Eric Gouriou <ego@rivosinc.com> | 2023-06-01 18:07:32 -0700 |
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committer | Eric Gouriou <ego@rivosinc.com> | 2023-06-19 14:30:34 -0700 |
commit | 00873aa61acae4a17c1d269cddf1885e83b50102 (patch) | |
tree | 7d4994b27ca32e8617fe3ec950b040200767cd9a /riscv/riscv.mk.in | |
parent | fbd4ca2eef884b6835e848d761b3e375a66fc47a (diff) | |
download | riscv-isa-sim-00873aa61acae4a17c1d269cddf1885e83b50102.zip riscv-isa-sim-00873aa61acae4a17c1d269cddf1885e83b50102.tar.gz riscv-isa-sim-00873aa61acae4a17c1d269cddf1885e83b50102.tar.bz2 |
Zvk: Implement Zvknh[ab], NIST Suite: Vector SHA-2
Implement the instructions part of the Zvknha and Zvknhb
sub-extensions:
- vsha2ms.vv, message schedule
- vsha2ch.vv / vsha2cl.vv, compression rounds
A header files for common macros is added.
Signed-off-by: Eric Gouriou <ego@rivosinc.com>
Diffstat (limited to 'riscv/riscv.mk.in')
-rw-r--r-- | riscv/riscv.mk.in | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in index 5562c09..4ce088f 100644 --- a/riscv/riscv.mk.in +++ b/riscv/riscv.mk.in @@ -1368,10 +1368,17 @@ riscv_insn_ext_zvkg= \ vghsh_vv \ vgmul_vv \ +# Covers both Zvknha and Zvkhnb. +riscv_insn_ext_zvknh = \ + vsha2cl_vv \ + vsha2ch_vv \ + vsha2ms_vv \ + riscv_insn_ext_zvk = \ $(riscv_insn_ext_zvbb) \ $(riscv_insn_ext_zvbc) \ $(riscv_insn_ext_zvkg) \ + $(riscv_insn_ext_zvknh) \ riscv_insn_list = \ $(if $(HAVE_INT128),$(riscv_insn_ext_v),) \ |