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| author | Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU> | 2011-04-09 17:50:12 -0700 |
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| committer | Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU> | 2011-04-09 17:50:12 -0700 |
| commit | 3c6275887f0cd321fec861dafd3bd405e992897a (patch) | |
| tree | 114823c7243821de298fa53d5e1b1739043d1d3e /riscv/riscv.ac | |
| parent | d31b94409cec4494f71dcd4d21e39fde85a3fd33 (diff) | |
| download | riscv-isa-sim-3c6275887f0cd321fec861dafd3bd405e992897a.zip riscv-isa-sim-3c6275887f0cd321fec861dafd3bd405e992897a.tar.gz riscv-isa-sim-3c6275887f0cd321fec861dafd3bd405e992897a.tar.bz2 | |
[sim,pk] reorganized status register
Diffstat (limited to 'riscv/riscv.ac')
| -rw-r--r-- | riscv/riscv.ac | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/riscv/riscv.ac b/riscv/riscv.ac index 7898145..9bb4f2f 100644 --- a/riscv/riscv.ac +++ b/riscv/riscv.ac @@ -8,6 +8,11 @@ AS_IF([test "x$enable_64bit" != "xno"], [ AC_DEFINE([RISCV_ENABLE_64BIT],,[Define if 64-bit mode is supported]) ]) +AC_ARG_ENABLE([rvc], AS_HELP_STRING([--disable-rvc], [Disable instruction compression])) +AS_IF([test "x$enable_rvc" != "xno"], [ + AC_DEFINE([RISCV_ENABLE_RVC],,[Define if instruction compression is supported]) +]) + libopc=`dirname \`which riscv-gcc\``/../`$ac_config_guess`/riscv/lib/libopcodes.a AC_CHECK_FILES([$libopc],[have_libopcodes="yes"],[have_libopcodes="no"]) |