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author | Andrew Waterman <andrew@sifive.com> | 2022-09-22 15:31:42 -0700 |
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committer | Andrew Waterman <andrew@sifive.com> | 2022-10-04 15:40:01 -0700 |
commit | ac89fe6ce3150dc651238991235b7f2e8ac93aec (patch) | |
tree | b4d11b95b006260de7749e3c68d25ce61d095532 /riscv/processor.h | |
parent | da93bdc435b985fd354e01c26470f64c33cecaa6 (diff) | |
download | riscv-isa-sim-ac89fe6ce3150dc651238991235b7f2e8ac93aec.zip riscv-isa-sim-ac89fe6ce3150dc651238991235b7f2e8ac93aec.tar.gz riscv-isa-sim-ac89fe6ce3150dc651238991235b7f2e8ac93aec.tar.bz2 |
Fix unused-function warning on sometimes-used function cto
Diffstat (limited to 'riscv/processor.h')
-rw-r--r-- | riscv/processor.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/processor.h b/riscv/processor.h index 7fc4be7..441e522 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -220,7 +220,7 @@ struct state_t }; // Count number of contiguous 1 bits starting from the LSB. -static int cto(reg_t val) +static inline int cto(reg_t val) { int res = 0; while ((val & 1) == 1) |