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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2019-12-19 23:12:05 -0800 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-01-13 22:47:37 -0800 |
| commit | 7928724c4a31cf103a44605716706efd6c25f7e2 (patch) | |
| tree | 20145838d2f2f194df0f193887d7f1513849bb85 /riscv/mmu.h | |
| parent | 816213f776d9e84b03eba515909f31c153c37dd7 (diff) | |
| download | riscv-isa-sim-7928724c4a31cf103a44605716706efd6c25f7e2.zip riscv-isa-sim-7928724c4a31cf103a44605716706efd6c25f7e2.tar.gz riscv-isa-sim-7928724c4a31cf103a44605716706efd6c25f7e2.tar.bz2 | |
commitlog: extend load/store record to keep multiple access
use vector to store memory accesses
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/mmu.h')
| -rw-r--r-- | riscv/mmu.h | 13 |
1 files changed, 4 insertions, 9 deletions
diff --git a/riscv/mmu.h b/riscv/mmu.h index c089ea1..c200084 100644 --- a/riscv/mmu.h +++ b/riscv/mmu.h @@ -83,10 +83,8 @@ public: #ifndef RISCV_ENABLE_COMMITLOG # define READ_MEM(addr, size) ({}) #else -# define READ_MEM(addr, size) ({ \ - proc->state.log_mem_read.addr = addr; \ - proc->state.log_mem_read.size = size; \ - }) +# define READ_MEM(addr, size) \ + proc->state.log_mem_read.push_back(std::make_tuple(addr, 0, size)); #endif // template for functions that load an aligned value from memory @@ -131,11 +129,8 @@ public: #ifndef RISCV_ENABLE_COMMITLOG # define WRITE_MEM(addr, value, size) ({}) #else -# define WRITE_MEM(addr, val, size) ({ \ - proc->state.log_mem_write.addr = addr; \ - proc->state.log_mem_write.value = val; \ - proc->state.log_mem_write.size = size; \ - }) +# define WRITE_MEM(addr, val, size) \ + proc->state.log_mem_write.push_back(std::make_tuple(addr, val, size)); #endif // template for functions that store an aligned value to memory |