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author | Tim Newsome <tim@sifive.com> | 2016-05-03 12:24:25 -0700 |
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committer | Tim Newsome <tim@sifive.com> | 2016-05-23 12:12:12 -0700 |
commit | 6a48baf8069bfc0d37d051a997ffe4cd9da268e8 (patch) | |
tree | 880e5d2a16ffa9c23a76c8149a6e3494dd22fec7 /riscv/mmu.cc | |
parent | 113ea7930bb9b73779f1febc6f7ad48c675d1d47 (diff) | |
download | riscv-isa-sim-6a48baf8069bfc0d37d051a997ffe4cd9da268e8.zip riscv-isa-sim-6a48baf8069bfc0d37d051a997ffe4cd9da268e8.tar.gz riscv-isa-sim-6a48baf8069bfc0d37d051a997ffe4cd9da268e8.tar.bz2 |
Remove unused code.
Add some debug printfs, which I'll be wanting for at least a little
while.
Diffstat (limited to 'riscv/mmu.cc')
-rw-r--r-- | riscv/mmu.cc | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/riscv/mmu.cc b/riscv/mmu.cc index dee41a9..df6770f 100644 --- a/riscv/mmu.cc +++ b/riscv/mmu.cc @@ -44,6 +44,8 @@ reg_t mmu_t::translate(reg_t addr, access_type type) if (get_field(proc->state.mstatus, MSTATUS_VM) == VM_MBARE) mode = PRV_M; + fprintf(stderr, "translate(0x%lx, %d), mstatus=0x%lx, prv=%ld, mode=%ld, pum=%d\n", + addr, type, proc->state.mstatus, proc->state.prv, mode, pum); if (mode == PRV_M) { reg_t msb_mask = (reg_t(2) << (proc->xlen-1))-1; // zero-extend from xlen return addr & msb_mask; @@ -74,6 +76,7 @@ const uint16_t* mmu_t::fetch_slow_path(reg_t vaddr) void mmu_t::load_slow_path(reg_t addr, reg_t len, uint8_t* bytes) { reg_t paddr = translate(addr, LOAD); + fprintf(stderr, "load_slow_path 0x%lx -> 0x%lx\n", addr, paddr); if (sim->addr_is_mem(paddr)) { memcpy(bytes, sim->addr_to_mem(paddr), len); if (tracer.interested_in_range(paddr, paddr + PGSIZE, LOAD)) @@ -88,6 +91,7 @@ void mmu_t::load_slow_path(reg_t addr, reg_t len, uint8_t* bytes) void mmu_t::store_slow_path(reg_t addr, reg_t len, const uint8_t* bytes) { reg_t paddr = translate(addr, STORE); + fprintf(stderr, "store_slow_path 0x%lx -> 0x%lx\n", addr, paddr); if (sim->addr_is_mem(paddr)) { memcpy(sim->addr_to_mem(paddr), bytes, len); if (tracer.interested_in_range(paddr, paddr + PGSIZE, STORE)) |