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| author | Andrew Waterman <aswaterman@gmail.com> | 2015-01-02 15:09:04 -0800 |
|---|---|---|
| committer | Andrew Waterman <aswaterman@gmail.com> | 2015-01-02 15:09:04 -0800 |
| commit | 3fd738af16ef977f1aa507e2525bb4c16fff9026 (patch) | |
| tree | 4b2ba07a5b3fd928fe17d330c262296547f48f00 /riscv/mmu.cc | |
| parent | e104cd11f504c2de3d1fdfa2ce9193f8f878d15c (diff) | |
| download | riscv-isa-sim-3fd738af16ef977f1aa507e2525bb4c16fff9026.zip riscv-isa-sim-3fd738af16ef977f1aa507e2525bb4c16fff9026.tar.gz riscv-isa-sim-3fd738af16ef977f1aa507e2525bb4c16fff9026.tar.bz2 | |
Reduce dependences on auto-generated code
In particular, precompiled headers ideally won't depend on any.
Diffstat (limited to 'riscv/mmu.cc')
| -rw-r--r-- | riscv/mmu.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/mmu.cc b/riscv/mmu.cc index 92cb6de..2e5de5b 100644 --- a/riscv/mmu.cc +++ b/riscv/mmu.cc @@ -16,7 +16,7 @@ mmu_t::~mmu_t() void mmu_t::flush_icache() { - for (size_t i = 0; i < ICACHE_SIZE; i++) + for (size_t i = 0; i < ICACHE_ENTRIES; i++) icache[i].tag = -1; } |