diff options
| author | Andrew Waterman <andrew@sifive.com> | 2017-06-30 13:19:18 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2017-06-30 13:19:18 -0700 |
| commit | a327416eac285f50dcbb04e8ddf89204c66ece02 (patch) | |
| tree | 84f2d2223ccf396778ae63f022896abe6c5258ca /riscv/insns | |
| parent | 3a4e89322a8c8dac94185812a238f13789ab392f (diff) | |
| download | riscv-isa-sim-a327416eac285f50dcbb04e8ddf89204c66ece02.zip riscv-isa-sim-a327416eac285f50dcbb04e8ddf89204c66ece02.tar.gz riscv-isa-sim-a327416eac285f50dcbb04e8ddf89204c66ece02.tar.bz2 | |
Remove reference to H-mode in ECALL
Diffstat (limited to 'riscv/insns')
| -rw-r--r-- | riscv/insns/ecall.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/insns/ecall.h b/riscv/insns/ecall.h index a933e4d..e298ac7 100644 --- a/riscv/insns/ecall.h +++ b/riscv/insns/ecall.h @@ -2,6 +2,6 @@ switch (STATE.prv) { case PRV_U: throw trap_user_ecall(); case PRV_S: throw trap_supervisor_ecall(); - case PRV_H: throw trap_hypervisor_ecall(); case PRV_M: throw trap_machine_ecall(); + default: abort(); } |