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author | Andrew Waterman <andrew@sifive.com> | 2023-05-09 12:24:04 -0700 |
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committer | GitHub <noreply@github.com> | 2023-05-09 12:24:04 -0700 |
commit | 8dd8f11510a33ada2c93d9071aecd33615445f5b (patch) | |
tree | 5dae50e4df55200c5f576745be1b956e3fcb28af /riscv/insns | |
parent | fcbdbe7946079650d0e656fa3d353e3f652d471f (diff) | |
parent | e25fb13bcd2fb2b108c3fe1d94831229adeb7e37 (diff) | |
download | riscv-isa-sim-8dd8f11510a33ada2c93d9071aecd33615445f5b.zip riscv-isa-sim-8dd8f11510a33ada2c93d9071aecd33615445f5b.tar.gz riscv-isa-sim-8dd8f11510a33ada2c93d9071aecd33615445f5b.tar.bz2 |
Merge pull request #1353 from ptomsich/ptomsich/1351-Zfa-fix-NX-fround-family
Zfa: fix NX handling for the fround/froundnx family
Diffstat (limited to 'riscv/insns')
-rw-r--r-- | riscv/insns/fround_d.h | 2 | ||||
-rw-r--r-- | riscv/insns/fround_h.h | 2 | ||||
-rw-r--r-- | riscv/insns/fround_q.h | 2 | ||||
-rw-r--r-- | riscv/insns/fround_s.h | 2 | ||||
-rw-r--r-- | riscv/insns/froundnx_d.h | 2 | ||||
-rw-r--r-- | riscv/insns/froundnx_h.h | 2 | ||||
-rw-r--r-- | riscv/insns/froundnx_q.h | 2 | ||||
-rw-r--r-- | riscv/insns/froundnx_s.h | 2 |
8 files changed, 8 insertions, 8 deletions
diff --git a/riscv/insns/fround_d.h b/riscv/insns/fround_d.h index 1127135..0e8a1ba 100644 --- a/riscv/insns/fround_d.h +++ b/riscv/insns/fround_d.h @@ -1,5 +1,5 @@ require_extension('D'); require_extension(EXT_ZFA); require_fp; -WRITE_FRD_D(f64_roundToInt(FRS1_D, RM, true)); +WRITE_FRD_D(f64_roundToInt(FRS1_D, RM, false)); set_fp_exceptions; diff --git a/riscv/insns/fround_h.h b/riscv/insns/fround_h.h index 6417a39..0c6cdae 100644 --- a/riscv/insns/fround_h.h +++ b/riscv/insns/fround_h.h @@ -1,5 +1,5 @@ require_extension(EXT_ZFH); require_extension(EXT_ZFA); require_fp; -WRITE_FRD_H(f16_roundToInt(FRS1_H, RM, true)); +WRITE_FRD_H(f16_roundToInt(FRS1_H, RM, false)); set_fp_exceptions; diff --git a/riscv/insns/fround_q.h b/riscv/insns/fround_q.h index 51ebce2..91bab77 100644 --- a/riscv/insns/fround_q.h +++ b/riscv/insns/fround_q.h @@ -1,5 +1,5 @@ require_extension('Q'); require_extension(EXT_ZFA); require_fp; -WRITE_FRD(f128_roundToInt(f128(FRS1), RM, true)); +WRITE_FRD(f128_roundToInt(f128(FRS1), RM, false)); set_fp_exceptions; diff --git a/riscv/insns/fround_s.h b/riscv/insns/fround_s.h index 272897e..f6e75f5 100644 --- a/riscv/insns/fround_s.h +++ b/riscv/insns/fround_s.h @@ -1,5 +1,5 @@ require_extension('F'); require_extension(EXT_ZFA); require_fp; -WRITE_FRD_F(f32_roundToInt(FRS1_F, RM, true)); +WRITE_FRD_F(f32_roundToInt(FRS1_F, RM, false)); set_fp_exceptions; diff --git a/riscv/insns/froundnx_d.h b/riscv/insns/froundnx_d.h index 0e8a1ba..1127135 100644 --- a/riscv/insns/froundnx_d.h +++ b/riscv/insns/froundnx_d.h @@ -1,5 +1,5 @@ require_extension('D'); require_extension(EXT_ZFA); require_fp; -WRITE_FRD_D(f64_roundToInt(FRS1_D, RM, false)); +WRITE_FRD_D(f64_roundToInt(FRS1_D, RM, true)); set_fp_exceptions; diff --git a/riscv/insns/froundnx_h.h b/riscv/insns/froundnx_h.h index 0c6cdae..6417a39 100644 --- a/riscv/insns/froundnx_h.h +++ b/riscv/insns/froundnx_h.h @@ -1,5 +1,5 @@ require_extension(EXT_ZFH); require_extension(EXT_ZFA); require_fp; -WRITE_FRD_H(f16_roundToInt(FRS1_H, RM, false)); +WRITE_FRD_H(f16_roundToInt(FRS1_H, RM, true)); set_fp_exceptions; diff --git a/riscv/insns/froundnx_q.h b/riscv/insns/froundnx_q.h index 91bab77..51ebce2 100644 --- a/riscv/insns/froundnx_q.h +++ b/riscv/insns/froundnx_q.h @@ -1,5 +1,5 @@ require_extension('Q'); require_extension(EXT_ZFA); require_fp; -WRITE_FRD(f128_roundToInt(f128(FRS1), RM, false)); +WRITE_FRD(f128_roundToInt(f128(FRS1), RM, true)); set_fp_exceptions; diff --git a/riscv/insns/froundnx_s.h b/riscv/insns/froundnx_s.h index f6e75f5..272897e 100644 --- a/riscv/insns/froundnx_s.h +++ b/riscv/insns/froundnx_s.h @@ -1,5 +1,5 @@ require_extension('F'); require_extension(EXT_ZFA); require_fp; -WRITE_FRD_F(f32_roundToInt(FRS1_F, RM, false)); +WRITE_FRD_F(f32_roundToInt(FRS1_F, RM, true)); set_fp_exceptions; |