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| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2013-07-26 20:25:18 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2013-07-26 20:25:18 -0700 |
| commit | 7a16302b4d8049d80bb56a0cd00cc226170c1ca7 (patch) | |
| tree | 687db59f4bf0adf02d16875bc29c46d15db6f8ea /riscv/insns | |
| parent | b357c97b249cdb13cc08f0893d73994662b5be8d (diff) | |
| download | riscv-isa-sim-7a16302b4d8049d80bb56a0cd00cc226170c1ca7.zip riscv-isa-sim-7a16302b4d8049d80bb56a0cd00cc226170c1ca7.tar.gz riscv-isa-sim-7a16302b4d8049d80bb56a0cd00cc226170c1ca7.tar.bz2 | |
New supervisor mode
Diffstat (limited to 'riscv/insns')
| -rw-r--r-- | riscv/insns/eret.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/riscv/insns/eret.h b/riscv/insns/eret.h index cd968bd..96d951c 100644 --- a/riscv/insns/eret.h +++ b/riscv/insns/eret.h @@ -1,5 +1,5 @@ require_supervisor; -if(sr & SR_ET) - throw trap_illegal_instruction; -set_pcr(PCR_SR, ((sr & SR_PS) ? sr : (sr & ~SR_S)) | SR_ET); +set_pcr(PCR_SR, ((sr & ~(SR_PS | SR_EI)) | + ((sr & SR_PS) ? 0 : SR_S)) | + ((sr & SR_PEI) ? SR_EI : 0)); set_pc(epc); |