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authorChih-Min Chao <chihmin.chao@sifive.com>2019-06-06 03:24:27 -0700
committerChih-Min Chao <chihmin.chao@sifive.com>2019-06-18 08:56:11 -0700
commit655aedc0ebd2326d69d389bc714c2d622bf2cb08 (patch)
treeaa2cf79905906cde9ff6d10c63d1499fb4a484a1 /riscv/insns/vdot_vv.h
parent235aa58bfb439c9782defe8bdd21f792e40aac31 (diff)
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rvv: add integer/fixed-point/mask/reduction/permutation instructions
based on v-spec 0.7.1, support sections: 12/13/15.1 ~ 15.2/16/17 element size: 8/16/32/64 support ediv: 1 Signed-off-by: Bruce Hoult <bruce@hoult.org> Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com> Signed-off-by: Dave Wen <dave.wen@sifive.com>
Diffstat (limited to 'riscv/insns/vdot_vv.h')
-rw-r--r--riscv/insns/vdot_vv.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/riscv/insns/vdot_vv.h b/riscv/insns/vdot_vv.h
new file mode 100644
index 0000000..7685230
--- /dev/null
+++ b/riscv/insns/vdot_vv.h
@@ -0,0 +1,5 @@
+// vdot vd, vs2, vs1
+VI_VV_LOOP
+({
+ vd += vs2 * vs1;
+})