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| author | Andrew Waterman <andrew@sifive.com> | 2022-10-19 17:21:11 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2022-10-19 21:12:25 -0700 |
| commit | 905db657f56c86b5fb558e7a3a5ea04dafa46858 (patch) | |
| tree | 24893efc910e55dffe589148dd183c461f81650d /riscv/insns/fld.h | |
| parent | 5746722334321b14c1937224f822cf47b1135b4e (diff) | |
| download | riscv-isa-sim-905db657f56c86b5fb558e7a3a5ea04dafa46858.zip riscv-isa-sim-905db657f56c86b5fb558e7a3a5ea04dafa46858.tar.gz riscv-isa-sim-905db657f56c86b5fb558e7a3a5ea04dafa46858.tar.bz2 | |
Fix imprecise exception on LR to MMIO space
The old implementation performed the load before checking whether the
memory region was valid for LR. So, for LR to MMIO, we would action
side effects before raising the exception, which is not precise.
Diffstat (limited to 'riscv/insns/fld.h')
0 files changed, 0 insertions, 0 deletions