diff options
author | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-09-04 13:39:42 -0700 |
---|---|---|
committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-09-04 13:39:42 -0700 |
commit | 784e9891af88db221b57bdffbea74d1c6bf99971 (patch) | |
tree | 3124895bbb1ed876d9951415696c7dd1bb06b208 /riscv/insns/c_sd.h | |
parent | 84b15dac7035f7e23fa821091ce97ae30ce2b0d8 (diff) | |
download | riscv-isa-sim-784e9891af88db221b57bdffbea74d1c6bf99971.zip riscv-isa-sim-784e9891af88db221b57bdffbea74d1c6bf99971.tar.gz riscv-isa-sim-784e9891af88db221b57bdffbea74d1c6bf99971.tar.bz2 |
Move towards RVC v1.8
Diffstat (limited to 'riscv/insns/c_sd.h')
-rw-r--r-- | riscv/insns/c_sd.h | 38 |
1 files changed, 0 insertions, 38 deletions
diff --git a/riscv/insns/c_sd.h b/riscv/insns/c_sd.h deleted file mode 100644 index 4551ced..0000000 --- a/riscv/insns/c_sd.h +++ /dev/null @@ -1,38 +0,0 @@ -require_extension('C'); -if (xlen == 32) { - int32_t res; - switch ((insn.bits() >> 10) & 7) { - case 0: - switch ((insn.bits() >> 5) & 3) { - case 0: res = RVC_RS1S ^ RVC_RS2S; // c.xor - case 1: res = int32_t(RVC_RS1S) >> (RVC_RS2S & 0x1f); // c.sra - default: require(0); - } - WRITE_RVC_RS1S(res); - break; - - case 1: - switch ((insn.bits() >> 5) & 3) { - case 0: res = RVC_RS1S << (RVC_RS2S & 0x1f); // c.sll - case 1: res = uint32_t(RVC_RS1S) >> (RVC_RS2S & 0x1f); // c.srl - case 2: res = int32_t(RVC_RS1S) < int32_t(RVC_RS2S); // c.slt - case 3: res = uint32_t(RVC_RS1S) < uint32_t(RVC_RS2S); // c.sltu - } - WRITE_RVC_RS1S(res); - break; - - case 3: - switch ((insn.bits() >> 5) & 3) { - case 0: res = RVC_RS1S << (RVC_RS2S & 0x1f); // c.sllr - case 1: res = uint32_t(RVC_RS1S) >> (RVC_RS2S & 0x1f); // c.srlr - case 2: res = int32_t(RVC_RS1S) < int32_t(RVC_RS2S); // c.sltr - case 3: res = uint32_t(RVC_RS1S) < uint32_t(RVC_RS2S); // c.sltur - } - WRITE_RVC_RS2S(res); - break; - - default: require(0); - } -} else { - MMU.store_uint64(RVC_RS1S + insn.rvc_ld_imm(), RVC_RS2S); -} |