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author | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-03-30 20:28:55 -0700 |
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committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-03-30 20:29:07 -0700 |
commit | 7f3c072750a71f2800cfb03531ec16699c20bb34 (patch) | |
tree | f92a5276dfb52c35348dd88dc55e3c57d00c5fe1 /riscv/insns/c_add.h | |
parent | 180554d8f20e6ed5d90790579b85535c890ebc68 (diff) | |
download | riscv-isa-sim-7f3c072750a71f2800cfb03531ec16699c20bb34.zip riscv-isa-sim-7f3c072750a71f2800cfb03531ec16699c20bb34.tar.gz riscv-isa-sim-7f3c072750a71f2800cfb03531ec16699c20bb34.tar.bz2 |
Implement RVC draft
Diffstat (limited to 'riscv/insns/c_add.h')
-rw-r--r-- | riscv/insns/c_add.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/riscv/insns/c_add.h b/riscv/insns/c_add.h new file mode 100644 index 0000000..b2ba34f --- /dev/null +++ b/riscv/insns/c_add.h @@ -0,0 +1,2 @@ +require_rvc; +WRITE_RD(sext_xlen(RVC_RS1 + RVC_RS2)); |