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| author | Ming-Yi Lai <ming-yi.lai@mediatek.com> | 2024-01-04 11:52:13 +0800 |
|---|---|---|
| committer | Ming-Yi Lai <ming-yi.lai@mediatek.com> | 2024-03-06 17:21:00 +0800 |
| commit | dffd42169bafb625cd30f8c0a9181dbebb85fe56 (patch) | |
| tree | 086c59db8004b3247ed6c183b44d205454af101a /riscv/execute.cc | |
| parent | b2a867f78e4aa53fb49629acb5eb2d3519c65899 (diff) | |
| download | riscv-isa-sim-dffd42169bafb625cd30f8c0a9181dbebb85fe56.zip riscv-isa-sim-dffd42169bafb625cd30f8c0a9181dbebb85fe56.tar.gz riscv-isa-sim-dffd42169bafb625cd30f8c0a9181dbebb85fe56.tar.bz2 | |
Zicfilp: Check that the next insn is a lpad if ELP is LP_EXPECTED
Diffstat (limited to 'riscv/execute.cc')
| -rw-r--r-- | riscv/execute.cc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/riscv/execute.cc b/riscv/execute.cc index 4f5860b..b2532c9 100644 --- a/riscv/execute.cc +++ b/riscv/execute.cc @@ -280,6 +280,7 @@ void processor_t::step(size_t n) in_wfi = false; insn_fetch_t fetch = mmu->load_insn(pc); + execute_insn_prehook(fetch.insn); if (debug && !state.serialized) disasm(fetch.insn); pc = execute_insn_logged(this, pc, fetch); @@ -291,6 +292,7 @@ void processor_t::step(size_t n) // Main simulation loop, fast path. for (auto ic_entry = _mmu->access_icache(pc); ; ) { auto fetch = ic_entry->data; + execute_insn_prehook(fetch.insn); pc = execute_insn_fast(this, pc, fetch); ic_entry = ic_entry->next; if (unlikely(ic_entry->tag != pc)) |