diff options
| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-04-01 00:45:20 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-05-04 09:50:05 -0700 |
| commit | b216e03dd1c10d17693053a1eb83a20fff3242ea (patch) | |
| tree | e143204aa5fa83b6bac321026e10f791444d39a2 /riscv/decode.h | |
| parent | d78999f0c7c44317b0c3fc2d34217418b5dbe086 (diff) | |
| download | riscv-isa-sim-b216e03dd1c10d17693053a1eb83a20fff3242ea.zip riscv-isa-sim-b216e03dd1c10d17693053a1eb83a20fff3242ea.tar.gz riscv-isa-sim-b216e03dd1c10d17693053a1eb83a20fff3242ea.tar.bz2 | |
rvv: fp16: support .vv instructions
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/decode.h')
| -rw-r--r-- | riscv/decode.h | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/riscv/decode.h b/riscv/decode.h index 6fa42a0..f455759 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -1662,7 +1662,8 @@ for (reg_t i = 0; i < vlmax && P.VU.vl != 0; ++i) { \ // #define VI_VFP_COMMON \ require_fp; \ - require((P.VU.vsew == e32 && p->supports_extension('F')) || \ + require((P.VU.vsew == e16 && p->supports_extension(EXT_ZFH)) || \ + (P.VU.vsew == e32 && p->supports_extension('F')) || \ (P.VU.vsew == e64 && p->supports_extension('D'))); \ require_vector;\ reg_t vl = P.VU.vl; \ @@ -1729,10 +1730,18 @@ for (reg_t i = 0; i < vlmax && P.VU.vl != 0; ++i) { \ P.VU.vstart = 0; \ set_fp_exceptions; -#define VI_VFP_VV_LOOP(BODY32, BODY64) \ +#define VI_VFP_VV_LOOP(BODY16, BODY32, BODY64) \ VI_CHECK_SSS(true); \ VI_VFP_LOOP_BASE \ switch(P.VU.vsew) { \ + case e16: {\ + float16_t &vd = P.VU.elt<float16_t>(rd_num, i, true); \ + float16_t vs1 = P.VU.elt<float16_t>(rs1_num, i); \ + float16_t vs2 = P.VU.elt<float16_t>(rs2_num, i); \ + BODY16; \ + set_fp_exceptions; \ + break; \ + }\ case e32: {\ float32_t &vd = P.VU.elt<float32_t>(rd_num, i, true); \ float32_t vs1 = P.VU.elt<float32_t>(rs1_num, i); \ @@ -1749,7 +1758,6 @@ for (reg_t i = 0; i < vlmax && P.VU.vl != 0; ++i) { \ set_fp_exceptions; \ break; \ }\ - case e16: \ default: \ require(0); \ break; \ |