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| author | liweiwei <liweiwei@iscas.ac.cn> | 2021-10-14 12:38:38 +0800 |
|---|---|---|
| committer | Weiwei Li <liweiwei@iscas.ac.cn> | 2022-08-04 10:11:29 +0800 |
| commit | 8aaae32d1d8fc3d20d62aae3039d6591346e95de (patch) | |
| tree | beda9a270136c63562d80d4e7b5606c66db9f57b /riscv/decode.h | |
| parent | 5de0c89c034cf64fdab8e36d2dc7488aa035d823 (diff) | |
| download | riscv-isa-sim-8aaae32d1d8fc3d20d62aae3039d6591346e95de.zip riscv-isa-sim-8aaae32d1d8fc3d20d62aae3039d6591346e95de.tar.gz riscv-isa-sim-8aaae32d1d8fc3d20d62aae3039d6591346e95de.tar.bz2 | |
Add support for freg command to read X regs when enable Zfinx
Update README
Diffstat (limited to 'riscv/decode.h')
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