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| author | Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU> | 2011-11-11 00:02:01 -0800 |
|---|---|---|
| committer | Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU> | 2011-11-11 00:02:01 -0800 |
| commit | 8a5c0e51c3fe386cf2cf4f40d1cb103d3a9f95fd (patch) | |
| tree | 8bbffc264327ae4a4c9853ce2394ee433cbfd4ff /riscv/decode.h | |
| parent | 069c07f440ac207a3bbe71f79c2834a9f0b919e5 (diff) | |
| download | riscv-isa-sim-8a5c0e51c3fe386cf2cf4f40d1cb103d3a9f95fd.zip riscv-isa-sim-8a5c0e51c3fe386cf2cf4f40d1cb103d3a9f95fd.tar.gz riscv-isa-sim-8a5c0e51c3fe386cf2cf4f40d1cb103d3a9f95fd.tar.bz2 | |
Changed supervisor mode
- initial PC is 0x2000
- PCRs renumbered
- clearing IPIs now requires a write to a different PCR
- IRQs are each given their own cause #
Diffstat (limited to 'riscv/decode.h')
| -rw-r--r-- | riscv/decode.h | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/riscv/decode.h b/riscv/decode.h index f78c8f4..9c364f6 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -48,11 +48,6 @@ const int JUMP_ALIGN_BITS = 1; #define IPI_IRQ 5 #define TIMER_IRQ 7 -#define CAUSE_EXCCODE 0x000000FF -#define CAUSE_IP 0x0000FF00 -#define CAUSE_EXCCODE_SHIFT 0 -#define CAUSE_IP_SHIFT 8 - #define FP_RD_NE 0 #define FP_RD_0 1 #define FP_RD_DN 2 |