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author | eopXD <yueh.ting.chen@gmail.com> | 2021-12-09 10:58:23 +0800 |
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committer | eopXD <yueh.ting.chen@gmail.com> | 2021-12-09 18:59:38 +0800 |
commit | 76bc15ad4bd51108d99aa4daa5af72c164559a3f (patch) | |
tree | f25303694cb016f0af2e2cac2ac1b581e3c23dac /riscv/decode.h | |
parent | 95c06fbc24c7745941689dae37f7d94faddfa8f5 (diff) | |
download | riscv-isa-sim-76bc15ad4bd51108d99aa4daa5af72c164559a3f.zip riscv-isa-sim-76bc15ad4bd51108d99aa4daa5af72c164559a3f.tar.gz riscv-isa-sim-76bc15ad4bd51108d99aa4daa5af72c164559a3f.tar.bz2 |
Simplfy vfcvt
Diffstat (limited to 'riscv/decode.h')
-rw-r--r-- | riscv/decode.h | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/riscv/decode.h b/riscv/decode.h index 5f566ce..541b46b 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -2389,6 +2389,40 @@ reg_t index[P.VU.vlmax]; \ set_fp_exceptions; \ VI_VFP_LOOP_END +#define VI_VFP_CVT_INT_TO_FP(BODY16, BODY32, BODY64, sign) \ + VI_CHECK_SDS(false); \ + switch(P.VU.vsew) { \ + case e16: \ + { VI_VFP_CVT_LOOP(CVT_INT_TO_FP_PARAMS(16, 16, sign), {}, BODY16); } \ + break; \ + case e32: \ + { VI_VFP_CVT_LOOP(CVT_INT_TO_FP_PARAMS(32, 32, sign), {}, BODY32); } \ + break; \ + case e64: \ + { VI_VFP_CVT_LOOP(CVT_INT_TO_FP_PARAMS(64, 64, sign), {}, BODY64); } \ + break; \ + default: \ + require(0); \ + break; \ + } + +#define VI_VFP_CVT_FP_TO_INT(BODY16, BODY32, BODY64, sign) \ + VI_CHECK_SDS(false); \ + switch(P.VU.vsew) { \ + case e16: \ + { VI_VFP_CVT_LOOP(CVT_FP_TO_INT_PARAMS(16, 16, sign), {}, BODY16); } \ + break; \ + case e32: \ + { VI_VFP_CVT_LOOP(CVT_FP_TO_INT_PARAMS(32, 32, sign), {}, BODY32); } \ + break; \ + case e64: \ + { VI_VFP_CVT_LOOP(CVT_FP_TO_INT_PARAMS(64, 64, sign), {}, BODY64); } \ + break; \ + default: \ + require(0); \ + break; \ + } + #define VI_VFP_NCVT_FP_TO_FP(BODY8, BODY16, BODY32, \ CHECK8, CHECK16, CHECK32) \ VI_CHECK_SDS(false); \ |