diff options
| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-04-09 01:27:03 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-04-09 18:33:56 -0700 |
| commit | 38b2a00e6cfe7657fc193eb01d60f03659fbb6c3 (patch) | |
| tree | 77e875096363853b5b49871bfccb65f510e8ab14 /riscv/decode.h | |
| parent | b6f7b65b659d485990430e5db3b7dc4a6ee94f8f (diff) | |
| download | riscv-isa-sim-38b2a00e6cfe7657fc193eb01d60f03659fbb6c3.zip riscv-isa-sim-38b2a00e6cfe7657fc193eb01d60f03659fbb6c3.tar.gz riscv-isa-sim-38b2a00e6cfe7657fc193eb01d60f03659fbb6c3.tar.bz2 | |
rvv: fix index segment load overlapping check
dst group can't overlap src group for segment case
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/decode.h')
| -rw-r--r-- | riscv/decode.h | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/riscv/decode.h b/riscv/decode.h index a1ad547..971b122 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -1479,11 +1479,11 @@ for (reg_t i = 0; i < vlmax; ++i) { \ #define VI_ST_COMMON(stride, offset, st_width, elt_byte) \ const reg_t nf = insn.v_nf() + 1; \ - require((nf * P.VU.vlmul) <= (NVPR / 4)); \ const reg_t vl = P.VU.vl; \ const reg_t baseAddr = RS1; \ const reg_t vs3 = insn.rd(); \ - require(vs3 + nf * P.VU.vlmul <= NVPR); \ + require((nf * P.VU.vlmul) <= (NVPR / 4) && \ + vs3 + nf * P.VU.vlmul <= NVPR); \ const reg_t vlmul = P.VU.vlmul; \ for (reg_t i = 0; i < vl; ++i) { \ VI_STRIP(i) \ @@ -1512,11 +1512,11 @@ for (reg_t i = 0; i < vlmax; ++i) { \ #define VI_LD_COMMON(stride, offset, ld_width, elt_byte) \ const reg_t nf = insn.v_nf() + 1; \ - require((nf * P.VU.vlmul) <= (NVPR / 4)); \ const reg_t vl = P.VU.vl; \ const reg_t baseAddr = RS1; \ const reg_t vd = insn.rd(); \ - require(vd + nf * P.VU.vlmul <= NVPR); \ + require((nf * P.VU.vlmul) <= (NVPR / 4) && \ + (vd + nf * P.VU.vlmul) <= NVPR); \ const reg_t vlmul = P.VU.vlmul; \ for (reg_t i = 0; i < vl; ++i) { \ VI_ELEMENT_SKIP(i); \ @@ -1548,7 +1548,9 @@ for (reg_t i = 0; i < vlmax; ++i) { \ #define VI_LD_INDEX(stride, offset, ld_width, elt_byte) \ VI_CHECK_LD_INDEX; \ - VI_LD_COMMON(stride, offset, ld_width, elt_byte) + VI_LD_COMMON(stride, offset, ld_width, elt_byte) \ + if (nf >= 2) \ + require(!is_overlapped(vd, nf, insn.rs2(), 1)); #define VI_ST(stride, offset, st_width, elt_byte) \ VI_CHECK_STORE_SXX; \ |