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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-10-22 01:06:35 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-10-26 22:37:45 -0700 |
| commit | 30a45bb89cf0b959e6d11f87150f311a8e315cf1 (patch) | |
| tree | ab30a939771027b585e487427314683fcd30d056 /riscv/decode.h | |
| parent | 1af67080dda8fdf4006139a01b5fbb888a23b093 (diff) | |
| download | riscv-isa-sim-30a45bb89cf0b959e6d11f87150f311a8e315cf1.zip riscv-isa-sim-30a45bb89cf0b959e6d11f87150f311a8e315cf1.tar.gz riscv-isa-sim-30a45bb89cf0b959e6d11f87150f311a8e315cf1.tar.bz2 | |
rvv: check extra dst for index segment load
each segment register group has to follow overlapping rule
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/decode.h')
| -rw-r--r-- | riscv/decode.h | 27 |
1 files changed, 15 insertions, 12 deletions
diff --git a/riscv/decode.h b/riscv/decode.h index 390e3d1..b4bb2e6 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -487,19 +487,22 @@ static inline bool is_aligned(const unsigned val, const unsigned pos) #define VI_CHECK_LD_INDEX(elt_width) \ VI_CHECK_ST_INDEX(elt_width); \ - if (elt_width > P.VU.vsew) { \ - if (insn.rd() != insn.rs2()) \ - require_noover(insn.rd(), P.VU.vflmul, insn.rs2(), vemul); \ - } else if (elt_width < P.VU.vsew) { \ - if (vemul < 1) {\ - require_noover(insn.rd(), P.VU.vflmul, insn.rs2(), vemul); \ - } else {\ - require_noover_widen(insn.rd(), P.VU.vflmul, insn.rs2(), vemul); \ + for (reg_t idx = 0; idx < nf; ++idx) { \ + reg_t flmul = P.VU.vflmul < 1 ? 1 : P.VU.vflmul; \ + reg_t seg_vd = insn.rd() + flmul * idx; \ + if (elt_width > P.VU.vsew) { \ + if (seg_vd != insn.rs2()) \ + require_noover(seg_vd, P.VU.vflmul, insn.rs2(), vemul); \ + } else if (elt_width < P.VU.vsew) { \ + if (vemul < 1) {\ + require_noover(seg_vd, P.VU.vflmul, insn.rs2(), vemul); \ + } else {\ + require_noover_widen(seg_vd, P.VU.vflmul, insn.rs2(), vemul); \ + } \ + } \ + if (nf >= 2) { \ + require_noover(seg_vd, P.VU.vflmul, insn.rs2(), vemul); \ } \ - } \ - if (insn.v_nf() > 0) {\ - require_noover(insn.rd(), P.VU.vflmul, insn.rs2(), vemul); \ - require_noover(vd, nf, insn.rs2(), 1); \ } \ require_vm; \ |