diff options
| author | Weiwei Li <liweiwei@iscas.ac.cn> | 2022-11-28 19:46:18 +0800 |
|---|---|---|
| committer | Weiwei Li <liweiwei@iscas.ac.cn> | 2022-11-28 19:46:18 +0800 |
| commit | 09fdfc30c26ff857816e481f4bb1a1a9a080a12b (patch) | |
| tree | 97efb4f5375b487fda60f883080ec66a9698b866 /riscv/decode.h | |
| parent | 425e858340459c9eb219e85a805b4d7011b42e46 (diff) | |
| download | riscv-isa-sim-09fdfc30c26ff857816e481f4bb1a1a9a080a12b.zip riscv-isa-sim-09fdfc30c26ff857816e481f4bb1a1a9a080a12b.tar.gz riscv-isa-sim-09fdfc30c26ff857816e481f4bb1a1a9a080a12b.tar.bz2 | |
Fix type error in some platform
Diffstat (limited to 'riscv/decode.h')
| -rw-r--r-- | riscv/decode.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/decode.h b/riscv/decode.h index 40111bc..bca413e 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -164,7 +164,7 @@ public: if (rlist >= 4) mask |= 1U << X_RA; - for (uint i = 5; i <= rlist; i++) + for (reg_t i = 5; i <= rlist; i++) mask |= 1U << Sn(i - 5); if (rlist == 15) |