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author | Jerry Zhao <jerryz123@berkeley.edu> | 2024-06-20 14:22:10 -0700 |
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committer | Jerry Zhao <jerryz123@berkeley.edu> | 2024-06-21 10:29:19 -0700 |
commit | a484f6efc5f50836bb8d846180dfbb9786d09ae2 (patch) | |
tree | 6a3658e9447449dc54ffea290c97f3a93092dd2c /riscv/csrs.cc | |
parent | 457ea8c0cdf5fd4a3bd04e0b9ea6d3b863d56841 (diff) | |
download | riscv-isa-sim-a484f6efc5f50836bb8d846180dfbb9786d09ae2.zip riscv-isa-sim-a484f6efc5f50836bb8d846180dfbb9786d09ae2.tar.gz riscv-isa-sim-a484f6efc5f50836bb8d846180dfbb9786d09ae2.tar.bz2 |
Relax vector_csr dependency on 'V'
Diffstat (limited to 'riscv/csrs.cc')
-rw-r--r-- | riscv/csrs.cc | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/riscv/csrs.cc b/riscv/csrs.cc index ad5ae08..e985db3 100644 --- a/riscv/csrs.cc +++ b/riscv/csrs.cc @@ -1428,8 +1428,6 @@ vector_csr_t::vector_csr_t(processor_t* const proc, const reg_t addr, const reg_ void vector_csr_t::verify_permissions(insn_t insn, bool write) const { require_vector_vs; - if (!proc->extension_enabled('V')) - throw trap_illegal_instruction(insn.bits()); basic_csr_t::verify_permissions(insn, write); } @@ -1451,8 +1449,6 @@ vxsat_csr_t::vxsat_csr_t(processor_t* const proc, const reg_t addr): void vxsat_csr_t::verify_permissions(insn_t insn, bool write) const { require_vector_vs; - if (!proc->extension_enabled('V')) - throw trap_illegal_instruction(insn.bits()); masked_csr_t::verify_permissions(insn, write); } |