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author | Yinan Xu <xuyinan@ict.ac.cn> | 2023-04-20 16:47:04 +0800 |
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committer | Yinan Xu <xuyinan@ict.ac.cn> | 2023-04-20 16:50:47 +0800 |
commit | 5afa62e541b67a5ebd03a8783858484afc7920e1 (patch) | |
tree | 3219db90abe3f7587aef415ede578635e66ad067 /fesvr/syscall.h | |
parent | 0835bd7729f317a009d9bec775f8e4bf420f93a7 (diff) | |
download | riscv-isa-sim-5afa62e541b67a5ebd03a8783858484afc7920e1.zip riscv-isa-sim-5afa62e541b67a5ebd03a8783858484afc7920e1.tar.gz riscv-isa-sim-5afa62e541b67a5ebd03a8783858484afc7920e1.tar.bz2 |
Close file descriptors in destructor of syscall_t
Diffstat (limited to 'fesvr/syscall.h')
-rw-r--r-- | fesvr/syscall.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/fesvr/syscall.h b/fesvr/syscall.h index 4915efd..c002e6c 100644 --- a/fesvr/syscall.h +++ b/fesvr/syscall.h @@ -28,6 +28,7 @@ class syscall_t : public device_t { public: syscall_t(htif_t*); + ~syscall_t(); void set_chroot(const char* where); @@ -38,6 +39,7 @@ class syscall_t : public device_t memif_t* memif; std::vector<syscall_func_t> table; fds_t fds; + std::vector<reg_t> fds_index; void handle_syscall(command_t cmd); void dispatch(addr_t mm); |