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| author | Scott Johnson <scott.johnson@arilinc.com> | 2022-11-16 15:44:58 -0600 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-11-16 13:44:58 -0800 |
| commit | 3e9d1627d21074c139a5c7b95ff792d885f87e6c (patch) | |
| tree | 8293dfffbf20c83025bc708f7386920255a8da2f /README.md | |
| parent | 0b14bb363ce7e4ca2be12e4965167ac3e7dca3fe (diff) | |
| download | riscv-isa-sim-3e9d1627d21074c139a5c7b95ff792d885f87e6c.zip riscv-isa-sim-3e9d1627d21074c139a5c7b95ff792d885f87e6c.tar.gz riscv-isa-sim-3e9d1627d21074c139a5c7b95ff792d885f87e6c.tar.bz2 | |
Document implemented trigger configuration (#1145)
Diffstat (limited to 'README.md')
| -rw-r--r-- | README.md | 1 |
1 files changed, 1 insertions, 0 deletions
@@ -38,6 +38,7 @@ Spike supports the following RISC-V ISA features: - Svpbmt extension, v1.0 - Svinval extension, v1.0 - Debug v0.14 + - 4 triggers fixed to type=2 (mcontrol) - Smepmp extension v1.0 - Smstateen extension, v1.0 - Sscofpmf v0.5.2 |