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| author | Andrew Waterman <andrew@sifive.com> | 2019-07-11 15:11:27 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2019-07-11 15:11:27 -0700 |
| commit | cbb979ddfb5201287c5d60d335bf1f12649e0a04 (patch) | |
| tree | e577e39e5d7a327bb8681993e689af5616c340bf | |
| parent | 364e9c641257738b3f1ba9f23d9fe0a0ccafce06 (diff) | |
| download | riscv-isa-sim-cbb979ddfb5201287c5d60d335bf1f12649e0a04.zip riscv-isa-sim-cbb979ddfb5201287c5d60d335bf1f12649e0a04.tar.gz riscv-isa-sim-cbb979ddfb5201287c5d60d335bf1f12649e0a04.tar.bz2 | |
Fix support for 32-bit hosts (but no V extension in that case!)
| -rw-r--r-- | Makefile.in | 2 | ||||
| -rwxr-xr-x | configure | 4 | ||||
| -rw-r--r-- | configure.ac | 3 | ||||
| -rw-r--r-- | riscv/decode.h | 3 | ||||
| -rw-r--r-- | riscv/processor.cc | 6 | ||||
| -rw-r--r-- | riscv/riscv.mk.in | 2 |
6 files changed, 14 insertions, 6 deletions
diff --git a/Makefile.in b/Makefile.in index 709a8c5..1dad9c9 100644 --- a/Makefile.in +++ b/Makefile.in @@ -36,6 +36,8 @@ project_name := @PACKAGE_TARNAME@ src_dir := @srcdir@ scripts_dir := $(src_dir)/scripts +HAVE_INT128 := @HAVE_INT128@ + # If the version information is not in the configure script, then we # assume that we are in a working directory. We use the vcs-version.sh # script in the scripts directory to generate an appropriate version @@ -626,6 +626,7 @@ ac_subst_vars='LTLIBOBJS LIBOBJS subprojects_enabled subprojects +HAVE_INT128 INSTALL_DATA INSTALL_SCRIPT INSTALL_PROGRAM @@ -4350,9 +4351,8 @@ fi ac_fn_cxx_check_type "$LINENO" "__int128_t" "ac_cv_type___int128_t" "$ac_includes_default" if test "x$ac_cv_type___int128_t" = xyes; then : + HAVE_INT128=yes -else - echo "error: spike requires 128 integer suuport"; exit 1 fi diff --git a/configure.ac b/configure.ac index cc72d64..f57de82 100644 --- a/configure.ac +++ b/configure.ac @@ -76,8 +76,7 @@ AC_HEADER_STDC # Checks for type #------------------------------------------------------------------------- -AC_CHECK_TYPE([__int128_t], [], - [echo "error: spike requires 128 integer suuport"; exit 1], []) +AC_CHECK_TYPE([__int128_t], AC_SUBST([HAVE_INT128],[yes])) #------------------------------------------------------------------------- # Default compiler flags diff --git a/riscv/decode.h b/riscv/decode.h index c588a86..087be2d 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -24,8 +24,11 @@ typedef int64_t sreg_t; typedef uint64_t reg_t; + +#ifdef __SIZEOF_INT128__ typedef __int128 int128_t; typedef unsigned __int128 uint128_t; +#endif const int NXPR = 32; const int NFPR = 32; diff --git a/riscv/processor.cc b/riscv/processor.cc index d182f7a..ca49b41 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -127,7 +127,11 @@ void processor_t::parse_isa_string(const char* str) lowercase += std::tolower(*r); const char* p = lowercase.c_str(); - const char* all_subsets = "imafdqcv"; + const char* all_subsets = "imafdqc" +#ifdef __SIZEOF_INT128__ + "v" +#endif + ""; max_xlen = 64; state.misa = reg_t(2) << 62; diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in index 7945d57..eed1f37 100644 --- a/riscv/riscv.mk.in +++ b/riscv/riscv.mk.in @@ -671,7 +671,7 @@ riscv_insn_list = \ $(riscv_insn_ext_f) \ $(riscv_insn_ext_d) \ $(riscv_insn_ext_q) \ - $(riscv_insn_ext_v) \ + $(if $(HAVE_INT128),$(riscv_insn_ext_v),) \ $(riscv_insn_priv) \ riscv_gen_srcs = \ |