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| author | Andrew Waterman <andrew@sifive.com> | 2020-02-19 16:28:51 -0800 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2020-02-20 15:28:47 -0800 |
| commit | a81fbad67234777f3ff74022ada67ded08af14d4 (patch) | |
| tree | 7ddb352c4020205e093ac0e5b1da111874218038 | |
| parent | 76e211d53e8e5ce7a6f2b44703c7fb31db8d5d0e (diff) | |
| download | riscv-isa-sim-a81fbad67234777f3ff74022ada67ded08af14d4.zip riscv-isa-sim-a81fbad67234777f3ff74022ada67ded08af14d4.tar.gz riscv-isa-sim-a81fbad67234777f3ff74022ada67ded08af14d4.tar.bz2 | |
Debug can actually start at 0x0 now
38438778f0fc34df8cdf748cc9f35e1d15e0c8db fixed the bug.
cc @timsifive
| -rw-r--r-- | riscv/decode.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/riscv/decode.h b/riscv/decode.h index ee07577..81ec1ad 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -1883,8 +1883,7 @@ for (reg_t i = 0; i < vlmax; ++i) { \ VI_VFP_LOOP_WIDE_END -// Seems that 0x0 doesn't work. -#define DEBUG_START 0x100 +#define DEBUG_START 0x0 #define DEBUG_END (0x1000 - 1) #endif |