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authorChih-Min Chao <chihmin.chao@sifive.com>2019-12-23 00:32:48 -0800
committerChih-Min Chao <chihmin.chao@sifive.com>2020-01-13 22:46:52 -0800
commit816213f776d9e84b03eba515909f31c153c37dd7 (patch)
tree01adeb94b66114b145a7628b54d4955a45345368
parent2940a9a604003aabbe2db727f0877f029a36db7c (diff)
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state: rewrite state_t initialization
implement a specific initalization function to avoid weird segfault when the member is complex structure such as map or hash. Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
-rw-r--r--riscv/decode.h8
-rw-r--r--riscv/processor.cc56
2 files changed, 59 insertions, 5 deletions
diff --git a/riscv/decode.h b/riscv/decode.h
index 21bb92b..797ca0f 100644
--- a/riscv/decode.h
+++ b/riscv/decode.h
@@ -139,6 +139,14 @@ public:
{
return data[i];
}
+ regfile_t()
+ {
+ reset();
+ }
+ void reset()
+ {
+ memset(data, 0, sizeof(data));
+ }
private:
T data[N];
};
diff --git a/riscv/processor.cc b/riscv/processor.cc
index a2433d9..9d7f301 100644
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -215,16 +215,62 @@ void processor_t::parse_isa_string(const char* str)
void state_t::reset(reg_t max_isa)
{
- memset(this, 0, sizeof(*this));
- misa = max_isa;
- prv = PRV_M;
pc = DEFAULT_RSTVEC;
+ XPR.reset();
+ FPR.reset();
+
+ prv = PRV_M;
+ misa = max_isa;
+ mstatus = 0;
+ mepc = 0;
+ mtval = 0;
+ mscratch = 0;
+ mtvec = 0;
+ mcause = 0;
+ minstret = 0;
+ mie = 0;
+ mip = 0;
+ medeleg = 0;
+ mideleg = 0;
+ mcounteren = 0;
+ scounteren = 0;
+ sepc = 0;
+ stval = 0;
+ sscratch = 0;
+ stvec = 0;
+ satp = 0;
+ scause = 0;
+
+ dpc = 0;
+ dscratch0 = 0;
+ dscratch1 = 0;
+ memset(&this->dcsr, 0, sizeof(this->dcsr));
+
tselect = 0;
- for (unsigned int i = 0; i < num_triggers; i++)
- mcontrol[i].type = 2;
+ for (auto &item : mcontrol)
+ item.type = 2;
+
+ memset(this->tdata2, 0, sizeof(this->tdata2));
+ debug_mode = false;
+ memset(this->pmpcfg, 0, sizeof(this->pmpcfg));
pmpcfg[0] = PMP_R | PMP_W | PMP_X | PMP_NAPOT;
+
+ memset(this->pmpaddr, 0, sizeof(this->pmpaddr));
pmpaddr[0] = ~reg_t(0);
+
+ fflags = 0;
+ frm = 0;
+ serialized = false;
+
+#ifdef RISCV_ENABLE_COMMITLOG
+ log_reg_write.addr = 0;
+ log_mem_read.size = 0;
+ log_mem_write.size = 0;
+ last_inst_priv = 0;
+ last_inst_xlen = 0;
+ last_inst_flen = 0;
+#endif
}
void vectorUnit_t::reset(){