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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-02-26 23:06:41 -0800 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-03-12 00:53:27 -0700 |
| commit | 5b6e779675c2908413821e07e61fcde2d48cd981 (patch) | |
| tree | 54b2b6820696af3d108345c4f8dec0d95b48d8f9 | |
| parent | 4c9b5767414cd9e2603ec99de8e9b8b199b5a1db (diff) | |
| download | riscv-isa-sim-5b6e779675c2908413821e07e61fcde2d48cd981.zip riscv-isa-sim-5b6e779675c2908413821e07e61fcde2d48cd981.tar.gz riscv-isa-sim-5b6e779675c2908413821e07e61fcde2d48cd981.tar.bz2 | |
rvv: fix vfmv.s.f and vfmv.f.s
vfmv.s.f
check valid vstart
vfmv.f.s
reset vstart in the end
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
| -rw-r--r-- | riscv/insns/vfmv_f_s.h | 2 | ||||
| -rw-r--r-- | riscv/insns/vfmv_s_f.h | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/riscv/insns/vfmv_f_s.h b/riscv/insns/vfmv_f_s.h index dbfe8f9..586b80e 100644 --- a/riscv/insns/vfmv_f_s.h +++ b/riscv/insns/vfmv_f_s.h @@ -26,3 +26,5 @@ if (FLEN == 64) { } else { WRITE_FRD(f32(vs2_0)); } + +P.VU.vstart = 0; diff --git a/riscv/insns/vfmv_s_f.h b/riscv/insns/vfmv_s_f.h index 1f319b5..84c5a3f 100644 --- a/riscv/insns/vfmv_s_f.h +++ b/riscv/insns/vfmv_s_f.h @@ -5,7 +5,7 @@ require_extension('F'); require(P.VU.vsew >= e32 && P.VU.vsew <= 64); reg_t vl = P.VU.vl; -if (vl > 0) { +if (vl > 0 && P.VU.vstart < vl) { reg_t rd_num = insn.rd(); switch(P.VU.vsew) { |